[PATCH] D156302: [AMDGPU][GlobalISel] Select G_ICMP with G_SELECT to avoid extra copies
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 26 07:23:31 PDT 2023
arsenm added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp:2077
+ MRI->hasOneNonDBGUse(CCReg)) {
+ Register SrcReg = CCDef->getOperand(2).getReg();
+ unsigned Size = RBI.getSizeInBits(SrcReg, *MRI, TRI);
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arsenm wrote:
> you don't know that there isn't an intervening def of SCC between the def and use point, which is the point of the copy. You could check computeRegisterLiveness for SCC, but I don't know if this is a scalable strategy. I think we'd be better off with some kind of general physreg def scheduler such that PeepholeOpt can deal with the copies
You'd also have to rely on computeRegisterLiveness only using live-out / backwards liveness. It won't see parent defs if they haven't been selected yet
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https://reviews.llvm.org/D156302/new/
https://reviews.llvm.org/D156302
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