[llvm] fca4a9d - [RISCV] Update Zvk shorthand extension to 1.0.0-rc1
Jim Lin via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 26 00:44:15 PDT 2023
Author: Jim Lin
Date: 2023-07-26T15:43:45+08:00
New Revision: fca4a9d5fcdda8496cce1207af606e143f240055
URL: https://github.com/llvm/llvm-project/commit/fca4a9d5fcdda8496cce1207af606e143f240055
DIFF: https://github.com/llvm/llvm-project/commit/fca4a9d5fcdda8496cce1207af606e143f240055.diff
LOG: [RISCV] Update Zvk shorthand extension to 1.0.0-rc1
1. Zvbc is not part of Zvkn.
2. Zvbc is not part of Zvks.
3. Add extensions implied into shorthand extension.
Also arrange its definition order as more closely its order in document.
Please refer to https://reviews.llvm.org/D152117 and https://reviews.llvm.org/D153836.
Document: https://github.com/riscv/riscv-crypto/releases/download/v20230620/riscv-crypto-spec-vector.pdf
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D156084
Added:
Modified:
llvm/lib/Target/RISCV/RISCVFeatures.td
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVFeatures.td b/llvm/lib/Target/RISCV/RISCVFeatures.td
index 4ce9c41eaf5c63..8cbeb3f62f6d4b 100644
--- a/llvm/lib/Target/RISCV/RISCVFeatures.td
+++ b/llvm/lib/Target/RISCV/RISCVFeatures.td
@@ -560,16 +560,6 @@ def HasStdExtZvkg : Predicate<"Subtarget->hasStdExtZvkg()">,
AssemblerPredicate<(all_of FeatureStdExtZvkg),
"'Zvkg' (Vector GCM instructions for Cryptography)">;
-def FeatureStdExtZvkn
- : SubtargetFeature<"experimental-zvkn", "HasStdExtZvkn", "true",
- "This extension is shorthand for the following set of "
- "other extensions: Zvkned, Zvknhb, Zvbb, Zvbc, and Zvkt.">;
-
-def FeatureStdExtZvknc
- : SubtargetFeature<"experimental-zvknc", "HasStdExtZvknc", "true",
- "This extension is shorthand for the following set of "
- "other extensions: Zvkn and Zvbc.">;
-
def FeatureStdExtZvkned
: SubtargetFeature<"experimental-zvkned", "HasStdExtZvkned", "true",
"'Zvkned' (Vector AES Encryption & Decryption (Single Round))">;
@@ -577,11 +567,6 @@ def HasStdExtZvkned : Predicate<"Subtarget->hasStdExtZvkned()">,
AssemblerPredicate<(all_of FeatureStdExtZvkned),
"'Zvkned' (Vector AES Encryption & Decryption (Single Round))">;
-def FeatureStdExtZvkng
- : SubtargetFeature<"experimental-zvkng", "HasStdExtZvkng", "true",
- "This extension is shorthand for the following set of "
- "other extensions: Zvkn and Zvkg.">;
-
def FeatureStdExtZvknha
: SubtargetFeature<"experimental-zvknha", "HasStdExtZvknha", "true",
"'Zvknha' (Vector SHA-2 (SHA-256 only))">;
@@ -594,16 +579,6 @@ def HasStdExtZvknha : Predicate<"Subtarget->hasStdExtZvknha()">,
AssemblerPredicate<(all_of FeatureStdExtZvknha),
"'Zvknha' (Vector SHA-2 (SHA-256 only))">;
-def FeatureStdExtZvks
- : SubtargetFeature<"experimental-zvks", "HasStdExtZvks", "true",
- "This extension is shorthand for the following set of "
- "other extensions: Zvksed, Zvksh, Zvbb, Zvbc, and Zvkt.">;
-
-def FeatureStdExtZvksc
- : SubtargetFeature<"experimental-zvksc", "HasStdExtZvksc", "true",
- "This extension is shorthand for the following set of "
- "other extensions: Zvks and Zvbc.">;
-
def FeatureStdExtZvksed
: SubtargetFeature<"experimental-zvksed", "HasStdExtZvksed", "true",
"'Zvksed' (SM4 Block Cipher Instructions)">;
@@ -611,11 +586,6 @@ def HasStdExtZvksed : Predicate<"Subtarget->hasStdExtZvksed()">,
AssemblerPredicate<(all_of FeatureStdExtZvksed),
"'Zvksed' (SM4 Block Cipher Instructions)">;
-def FeatureStdExtZvksg
- : SubtargetFeature<"experimental-zvksg", "HasStdExtZvksg", "true",
- "This extension is shorthand for the following set of "
- "other extensions: Zvks and Zvkg.">;
-
def FeatureStdExtZvksh
: SubtargetFeature<"experimental-zvksh", "HasStdExtZvksh", "true",
"'Zvksh' (SM3 Hash Function Instructions)">;
@@ -627,6 +597,46 @@ def FeatureStdExtZvkt
: SubtargetFeature<"experimental-zvkt", "HasStdExtZvkt", "true",
"'Zvkt' (Vector Data-Independent Execution Latency)">;
+// Zvk short-hand extensions
+
+def FeatureStdExtZvkn
+ : SubtargetFeature<"experimental-zvkn", "HasStdExtZvkn", "true",
+ "This extension is shorthand for the following set of "
+ "other extensions: Zvkned, Zvknhb, Zvbb and Zvkt.",
+ [FeatureStdExtZvkned, FeatureStdExtZvknhb,
+ FeatureStdExtZvbb, FeatureStdExtZvkt]>;
+
+def FeatureStdExtZvknc
+ : SubtargetFeature<"experimental-zvknc", "HasStdExtZvknc", "true",
+ "This extension is shorthand for the following set of "
+ "other extensions: Zvkn and Zvbc.",
+ [FeatureStdExtZvkn, FeatureStdExtZvbc]>;
+
+def FeatureStdExtZvkng
+ : SubtargetFeature<"experimental-zvkng", "HasStdExtZvkng", "true",
+ "This extension is shorthand for the following set of "
+ "other extensions: Zvkn and Zvkg.",
+ [FeatureStdExtZvkn, FeatureStdExtZvkg]>;
+
+def FeatureStdExtZvks
+ : SubtargetFeature<"experimental-zvks", "HasStdExtZvks", "true",
+ "This extension is shorthand for the following set of "
+ "other extensions: Zvksed, Zvksh, Zvbb and Zvkt.",
+ [FeatureStdExtZvksed, FeatureStdExtZvksh,
+ FeatureStdExtZvbb, FeatureStdExtZvkt]>;
+
+def FeatureStdExtZvksc
+ : SubtargetFeature<"experimental-zvksc", "HasStdExtZvksc", "true",
+ "This extension is shorthand for the following set of "
+ "other extensions: Zvks and Zvbc.",
+ [FeatureStdExtZvks, FeatureStdExtZvbc]>;
+
+def FeatureStdExtZvksg
+ : SubtargetFeature<"experimental-zvksg", "HasStdExtZvksg", "true",
+ "This extension is shorthand for the following set of "
+ "other extensions: Zvks and Zvkg.",
+ [FeatureStdExtZvks, FeatureStdExtZvkg]>;
+
def FeatureStdExtZicond
: SubtargetFeature<"experimental-zicond", "HasStdExtZicond", "true",
"'Zicond' (Integer Conditional Operations)">;
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