[llvm] 0cd8a28 - [Attributor][FIX] No IntraFnReachability does not mean unreachable
Johannes Doerfert via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 25 17:47:49 PDT 2023
Author: Johannes Doerfert
Date: 2023-07-25T17:47:33-07:00
New Revision: 0cd8a28941ac88ed7567589466d12bf5d7549224
URL: https://github.com/llvm/llvm-project/commit/0cd8a28941ac88ed7567589466d12bf5d7549224
DIFF: https://github.com/llvm/llvm-project/commit/0cd8a28941ac88ed7567589466d12bf5d7549224.diff
LOG: [Attributor][FIX] No IntraFnReachability does not mean unreachable
Also, first check inter fn reachability as it seems to be cheaper in
practise.
Added:
Modified:
llvm/lib/Transforms/IPO/AttributorAttributes.cpp
llvm/test/Transforms/OpenMP/value-simplify-openmp-opt.ll
Removed:
################################################################################
diff --git a/llvm/lib/Transforms/IPO/AttributorAttributes.cpp b/llvm/lib/Transforms/IPO/AttributorAttributes.cpp
index 274f3167a0a41d..ca3059a280085a 100644
--- a/llvm/lib/Transforms/IPO/AttributorAttributes.cpp
+++ b/llvm/lib/Transforms/IPO/AttributorAttributes.cpp
@@ -10590,10 +10590,12 @@ struct AAInterFnReachabilityFunction
// Determine call like instructions that we can reach from the inst.
auto CheckCallBase = [&](Instruction &CBInst) {
- if (!IntraFnReachability || !IntraFnReachability->isAssumedReachable(
- A, *RQI.From, CBInst, RQI.ExclusionSet))
+ // There are usually less nodes in the call graph, check inter function
+ // reachability first.
+ if (CheckReachableCallBase(cast<CallBase>(&CBInst)))
return true;
- return CheckReachableCallBase(cast<CallBase>(&CBInst));
+ return IntraFnReachability && !IntraFnReachability->isAssumedReachable(
+ A, *RQI.From, CBInst, RQI.ExclusionSet);
};
bool UsedExclusionSet = /* conservative */ true;
diff --git a/llvm/test/Transforms/OpenMP/value-simplify-openmp-opt.ll b/llvm/test/Transforms/OpenMP/value-simplify-openmp-opt.ll
index 15579bbd46b0f4..be4476676d581d 100644
--- a/llvm/test/Transforms/OpenMP/value-simplify-openmp-opt.ll
+++ b/llvm/test/Transforms/OpenMP/value-simplify-openmp-opt.ll
@@ -23,6 +23,8 @@ target triple = "amdgcn-amd-amdhsa"
@QD3 = internal addrspace(3) global i32 undef, align 4
@UAA1 = internal addrspace(3) global i32 undef, align 4
@UAA2 = internal addrspace(3) global i32 undef, align 4
+ at UAA3 = internal addrspace(3) global i32 undef, align 4
+ at UANA1 = internal addrspace(3) global i32 undef, align 4
@str = private unnamed_addr addrspace(4) constant [1 x i8] c"\00", align 1
; Make sure we do not delete the stores to @G without also replacing the load with `1`.
@@ -44,6 +46,8 @@ target triple = "amdgcn-amd-amdhsa"
; TUNIT: @[[QD3:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
; TUNIT: @[[UAA1:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
; TUNIT: @[[UAA2:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
+; TUNIT: @[[UAA3:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
+; TUNIT: @[[UANA1:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
; TUNIT: @[[STR:[a-zA-Z0-9_$"\\.-]+]] = private unnamed_addr addrspace(4) constant [1 x i8] zeroinitializer, align 1
; TUNIT: @[[KERNEL_NESTED_PARALLELISM:[a-zA-Z0-9_$"\\.-]+]] = weak hidden constant i8 0
;.
@@ -64,6 +68,8 @@ target triple = "amdgcn-amd-amdhsa"
; CGSCC: @[[QD3:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
; CGSCC: @[[UAA1:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
; CGSCC: @[[UAA2:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
+; CGSCC: @[[UAA3:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
+; CGSCC: @[[UANA1:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
; CGSCC: @[[STR:[a-zA-Z0-9_$"\\.-]+]] = private unnamed_addr addrspace(4) constant [1 x i8] zeroinitializer, align 1
;.
define void @kernel() "kernel" {
@@ -677,7 +683,7 @@ define void @kernel_unknown_and_aligned1(i1 %c) "kernel" {
; TUNIT-SAME: (i1 [[C:%.*]]) #[[ATTR1]] {
; TUNIT-NEXT: br i1 [[C]], label [[S:%.*]], label [[L:%.*]]
; TUNIT: L:
-; TUNIT-NEXT: call void @use1(i32 2) #[[ATTR7]]
+; TUNIT-NEXT: call void @use1(i32 undef) #[[ATTR7]]
; TUNIT-NEXT: ret void
; TUNIT: S:
; TUNIT-NEXT: call void @sync()
@@ -689,7 +695,7 @@ define void @kernel_unknown_and_aligned1(i1 %c) "kernel" {
; CGSCC-SAME: (i1 [[C:%.*]]) #[[ATTR1]] {
; CGSCC-NEXT: br i1 [[C]], label [[S:%.*]], label [[L:%.*]]
; CGSCC: L:
-; CGSCC-NEXT: call void @use1(i32 2) #[[ATTR6]]
+; CGSCC-NEXT: call void @use1(i32 undef) #[[ATTR6]]
; CGSCC-NEXT: ret void
; CGSCC: S:
; CGSCC-NEXT: call void @sync()
@@ -717,7 +723,7 @@ define void @kernel_unknown_and_aligned2(i1 %c) "kernel" {
; TUNIT-NEXT: br i1 [[C]], label [[S:%.*]], label [[L:%.*]]
; TUNIT: L:
; TUNIT-NEXT: call void @sync()
-; TUNIT-NEXT: call void @use1(i32 2) #[[ATTR7]]
+; TUNIT-NEXT: call void @use1(i32 undef) #[[ATTR7]]
; TUNIT-NEXT: ret void
; TUNIT: S:
; TUNIT-NEXT: call void @sync()
@@ -730,7 +736,7 @@ define void @kernel_unknown_and_aligned2(i1 %c) "kernel" {
; CGSCC-NEXT: br i1 [[C]], label [[S:%.*]], label [[L:%.*]]
; CGSCC: L:
; CGSCC-NEXT: call void @sync()
-; CGSCC-NEXT: call void @use1(i32 2) #[[ATTR6]]
+; CGSCC-NEXT: call void @use1(i32 undef) #[[ATTR6]]
; CGSCC-NEXT: ret void
; CGSCC: S:
; CGSCC-NEXT: call void @sync()
@@ -752,6 +758,85 @@ S:
ret void
}
+define void @kernel_unknown_and_aligned3(i1 %c) "kernel" {
+; TUNIT-LABEL: define {{[^@]+}}@kernel_unknown_and_aligned3
+; TUNIT-SAME: (i1 [[C:%.*]]) #[[ATTR1]] {
+; TUNIT-NEXT: br i1 [[C]], label [[S:%.*]], label [[L:%.*]]
+; TUNIT: L:
+; TUNIT-NEXT: call void @sync()
+; TUNIT-NEXT: call void @use1(i32 2) #[[ATTR7]]
+; TUNIT-NEXT: call void @barrier() #[[ATTR7]]
+; TUNIT-NEXT: ret void
+; TUNIT: S:
+; TUNIT-NEXT: call void @sync()
+; TUNIT-NEXT: call void @sync()
+; TUNIT-NEXT: ret void
+;
+; CGSCC-LABEL: define {{[^@]+}}@kernel_unknown_and_aligned3
+; CGSCC-SAME: (i1 [[C:%.*]]) #[[ATTR1]] {
+; CGSCC-NEXT: br i1 [[C]], label [[S:%.*]], label [[L:%.*]]
+; CGSCC: L:
+; CGSCC-NEXT: call void @sync()
+; CGSCC-NEXT: call void @use1(i32 2) #[[ATTR6]]
+; CGSCC-NEXT: call void @barrier() #[[ATTR6]]
+; CGSCC-NEXT: ret void
+; CGSCC: S:
+; CGSCC-NEXT: call void @sync()
+; CGSCC-NEXT: call void @sync()
+; CGSCC-NEXT: ret void
+;
+ br i1 %c, label %S, label %L
+L:
+ call void @sync();
+ %v = load i32, ptr addrspace(3) @UAA3
+ call void @use1(i32 %v)
+ call void @barrier();
+ ret void
+S:
+ call void @sync();
+ store i32 2, ptr addrspace(3) @UAA3
+ call void @sync();
+ ret void
+}
+
+define void @kernel_unknown_and_not_aligned1(i1 %c) "kernel" {
+; TUNIT-LABEL: define {{[^@]+}}@kernel_unknown_and_not_aligned1
+; TUNIT-SAME: (i1 [[C:%.*]]) #[[ATTR1]] {
+; TUNIT-NEXT: br i1 [[C]], label [[S:%.*]], label [[L:%.*]]
+; TUNIT: L:
+; TUNIT-NEXT: call void @sync()
+; TUNIT-NEXT: call void @use1(i32 2) #[[ATTR7]]
+; TUNIT-NEXT: ret void
+; TUNIT: S:
+; TUNIT-NEXT: call void @sync()
+; TUNIT-NEXT: call void @sync()
+; TUNIT-NEXT: ret void
+;
+; CGSCC-LABEL: define {{[^@]+}}@kernel_unknown_and_not_aligned1
+; CGSCC-SAME: (i1 [[C:%.*]]) #[[ATTR1]] {
+; CGSCC-NEXT: br i1 [[C]], label [[S:%.*]], label [[L:%.*]]
+; CGSCC: L:
+; CGSCC-NEXT: call void @sync()
+; CGSCC-NEXT: call void @use1(i32 2) #[[ATTR6]]
+; CGSCC-NEXT: ret void
+; CGSCC: S:
+; CGSCC-NEXT: call void @sync()
+; CGSCC-NEXT: call void @sync()
+; CGSCC-NEXT: ret void
+;
+ br i1 %c, label %S, label %L
+L:
+ call void @sync();
+ %v = load i32, ptr addrspace(3) @UANA1
+ call void @use1(i32 %v)
+ ret void
+S:
+ call void @sync();
+ store i32 2, ptr addrspace(3) @UANA1
+ call void @sync();
+ ret void
+}
+
declare void @sync()
declare void @barrier() norecurse nounwind nocallback "llvm.assume"="ompx_aligned_barrier"
declare void @use1(i32) nosync norecurse nounwind nocallback
@@ -760,7 +845,7 @@ declare void @__kmpc_target_deinit(ptr, i8) nocallback
declare void @llvm.assume(i1)
!llvm.module.flags = !{!0, !1}
-!nvvm.annotations = !{!2, !3, !4, !5, !6, !7, !8, !9, !10, !11, !12, !13, !14, !15, !16, !17, !18}
+!nvvm.annotations = !{!2, !3, !4, !5, !6, !7, !8, !9, !10, !11, !12, !13, !14, !15, !16, !17, !18, !19, !20}
!0 = !{i32 7, !"openmp", i32 50}
!1 = !{i32 7, !"openmp-device", i32 50}
@@ -781,6 +866,8 @@ declare void @llvm.assume(i1)
!16 = !{ptr @kernel4d3, !"kernel", i32 1}
!17 = !{ptr @kernel_unknown_and_aligned1, !"kernel", i32 1}
!18 = !{ptr @kernel_unknown_and_aligned2, !"kernel", i32 1}
+!19 = !{ptr @kernel_unknown_and_aligned3, !"kernel", i32 1}
+!20 = !{ptr @kernel_unknown_and_not_aligned1, !"kernel", i32 1}
;.
; TUNIT: attributes #[[ATTR0]] = { norecurse "kernel" }
@@ -819,4 +906,6 @@ declare void @llvm.assume(i1)
; CHECK: [[META16:![0-9]+]] = !{ptr @kernel4d3, !"kernel", i32 1}
; CHECK: [[META17:![0-9]+]] = !{ptr @kernel_unknown_and_aligned1, !"kernel", i32 1}
; CHECK: [[META18:![0-9]+]] = !{ptr @kernel_unknown_and_aligned2, !"kernel", i32 1}
+; CHECK: [[META19:![0-9]+]] = !{ptr @kernel_unknown_and_aligned3, !"kernel", i32 1}
+; CHECK: [[META20:![0-9]+]] = !{ptr @kernel_unknown_and_not_aligned1, !"kernel", i32 1}
;.
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