[PATCH] D156271: RegisterCoalescer: Forcibly leave SSA to avoid MIR test errors

[Matt Arsenault via Phabricator via llvm-commits]

arsenm created this revision.
arsenm added reviewers: qcolombet, MatzeB, kparzysz, aemerson, bogner.
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Not sure how to produce a test that demonstrates the problem
today. The coalescer would have to introduce a verifier caught SSA
violation, like multiple defs of a virtual register. I'm not sure what
would do that now, but an upcoming patch will.


https://reviews.llvm.org/D156271

Files:
  llvm/lib/CodeGen/RegisterCoalescer.cpp


Index: llvm/lib/CodeGen/RegisterCoalescer.cpp
===================================================================
--- llvm/lib/CodeGen/RegisterCoalescer.cpp
+++ llvm/lib/CodeGen/RegisterCoalescer.cpp
@@ -4129,6 +4129,14 @@
   else
     JoinGlobalCopies = (EnableGlobalCopies == cl::BOU_TRUE);
 
+  // FIXME: MachineFunctionProperties cannot express the required pre-property
+  // no-SSA. When running a MIR testcase without any virtual register defs, the
+  // MIR parser assumes SSA. MachineFunctionPass::getClearedProperties is called
+  // after the pass is run, so the properties at this point say it's an SSA
+  // function.  Forcibly clear it here so -verify-coalescing doesn't complain
+  // after multiple virtual register defs are introduced.
+  MRI->leaveSSA();
+
   // If there are PHIs tracked by debug-info, they will need updating during
   // coalescing. Build an index of those PHIs to ease updating.
   SlotIndexes *Slots = LIS->getSlotIndexes();


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