[PATCH] D155087: [RegAlloc] Fix assertion failure caused by inline assembly

Bryan Chan via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jul 25 14:06:53 PDT 2023


bryanpkc added inline comments.


================
Comment at: llvm/lib/CodeGen/RegAllocFast.cpp:941
+      setPhysReg(MI, MO, *AllocationOrder.begin());
+      return true;
+    }
----------------
arsenm wrote:
> bryanpkc wrote:
> > arsenm wrote:
> > > bryanpkc wrote:
> > > > Why doesn't this return the result of `setPhysReg`?
> > > > 
> > > > You should also add a comment to explain that since there was an error finding a suitable register for `LRI`, we just pick a register at random and bail out of the function immediately.
> > > Should also guard against AllocationOrder being empty which can happen if all the registers become reserved, I guess you just have to use noreg at that point
> > @arsenm This pass uses `emitError` to indicate that the IR is no longer valid, but is still required to continue and complete register allocation. If we enter this code path, we don't expect to generate correct code anyway, so I think it should be okay to skip the check, both here and in `useVirtReg`.
> If AllocationOrder is empty the compiler will just immediately crash which is not helpful
I see, I had misread your comment. Thanks.


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https://reviews.llvm.org/D155087



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