[PATCH] D156214: [LLVM][RISCV] Check more extension dependencies
Kiva via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 25 02:43:28 PDT 2023
imkiva added a comment.
address review comments
================
Comment at: llvm/lib/Support/RISCVISAInfo.cpp:948
- // TODO: The 'q' extension requires rv64.
- // TODO: It is illegal to specify 'e' extensions with 'f' and 'd'.
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wangpc wrote:
> I think the comment is outdated here. `E` can be combined with all other extensions according to spec:
> > Unless otherwise stated, standard extensions compatible with RV32I and RV64I are also compatible with RV32E and RV64E, respectively.
> And, please see also D70401 for more context.
I downloaded the specification from [here](https://github.com/riscv/riscv-isa-manual/releases/download/Ratified-IMAFDQC/riscv-spec-20191213.pdf), and in page 34 the footnote says:
> RV32E can be combined with all current standard extensions. Defining the F, D, and Q extensions as having a 16-entry floating point register file when combined with RV32E was considered but **decided against**. To support systems with reduced floating-point register state, we intend to define a “Zfinx” extension...
It seems in the spec version 20191213, they rejected the combination of `E` with standard floating-point extensions, instead, a separate extension `Zfinx` is chosen for the original purpose.
I am not sure if there's any newer specification that decides to allow this combination.
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