[PATCH] D154918: [LoongArch] Add test case showing suboptimal codegen when zero extending

[Lu Weining via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG1a3da0bc1e5a: [LoongArch] Add test case showing suboptimal codegen when zero extending (authored by hev, committed by SixWeining).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D154918/new/

https://reviews.llvm.org/D154918

Files:
  llvm/test/CodeGen/LoongArch/sext-cheaper-than-zext.ll


Index: llvm/test/CodeGen/LoongArch/sext-cheaper-than-zext.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/LoongArch/sext-cheaper-than-zext.ll
@@ -0,0 +1,17 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc --mtriple=loongarch64 < %s | FileCheck %s
+
+define signext i32 @sext_icmp(i32 signext %x, i32 signext %y) {
+; CHECK-LABEL: sext_icmp:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    bstrpick.d $a1, $a1, 31, 0
+; CHECK-NEXT:    addi.d $a0, $a0, 1
+; CHECK-NEXT:    bstrpick.d $a0, $a0, 31, 0
+; CHECK-NEXT:    xor $a0, $a0, $a1
+; CHECK-NEXT:    sltu $a0, $zero, $a0
+; CHECK-NEXT:    ret
+  %1 = add nsw i32 %x, 1
+  %2 = icmp ne i32 %1, %y
+  %3 = zext i1 %2 to i32
+  ret i32 %3
+}


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