[PATCH] D156144: [RISCV] Add simple DAG combine to pull xor with 1 through select_cc.

[Craig Topper via Phabricator via llvm-commits]

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If we're selecting the result of two setccs that have been legalized
by introducing an xor with 1, we can pull the xor with 1 through the
select to enable more optimizations.

We could generalize this to other binary operators with identical
conditions, but those are usually caught before we legalize the select.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D156144

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/test/CodeGen/RISCV/atomic-rmw.ll
  llvm/test/CodeGen/RISCV/atomic-signext.ll
  llvm/test/CodeGen/RISCV/atomicrmw-uinc-udec-wrap.ll
  llvm/test/CodeGen/RISCV/condops.ll

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