[PATCH] D156140: [DAGCombiner] Minor improvements to foldAndOrOfSETCC. NFC
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 24 09:41:04 PDT 2023
craig.topper created this revision.
craig.topper added reviewers: kmitropoulou, RKSimon, arsenm, foad.
Herald added subscribers: StephenFan, hiraditya.
Herald added a project: All.
craig.topper requested review of this revision.
Herald added a subscriber: wdng.
Herald added a project: LLVM.
Reduce the scope of some variables.
Replace an if with an assertion.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D156140
Files:
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
===================================================================
--- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -6054,10 +6054,6 @@
TLI.isOperationLegal(ISD::SMAX, OpVT) &&
TLI.isOperationLegal(ISD::UMIN, OpVT) &&
TLI.isOperationLegal(ISD::SMIN, OpVT)) {
- SDValue CommonValue;
- SDValue Operand1;
- SDValue Operand2;
- ISD::CondCode CC = ISD::SETCC_INVALID;
if (LHS->getOpcode() == ISD::SETCC && RHS->getOpcode() == ISD::SETCC &&
LHS->hasOneUse() && RHS->hasOneUse() &&
// The two comparisons should have either the same predicate or the
@@ -6065,6 +6061,8 @@
(CCL == CCR || CCL == ISD::getSetCCSwappedOperands(CCR)) &&
// The optimization does not work for `==` or `!=` .
!ISD::isIntEqualitySetCC(CCL) && !ISD::isIntEqualitySetCC(CCR)) {
+ SDValue CommonValue, Operand1, Operand2;
+ ISD::CondCode CC = ISD::SETCC_INVALID;
if (CCL == CCR) {
if (LHS0 == RHS0) {
CommonValue = LHS0;
@@ -6077,7 +6075,8 @@
Operand2 = RHS0;
CC = CCL;
}
- } else if (CCL == ISD::getSetCCSwappedOperands(CCR)) {
+ } else {
+ assert(CCL == ISD::getSetCCSwappedOperands(CCR) && "Unexpected CC");
if (LHS0 == RHS1) {
CommonValue = LHS0;
Operand1 = LHS1;
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