[PATCH] D156112: [AArch64][LoopVectorize] Improve tail-folding heuristic on neoverse-v1

[Igor Kirillov via Phabricator via llvm-commits]

igor.kirillov created this revision.
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Increases the number of instructions predication tail-folding threshold
when the loop has more than one comparison. The reason for this is that
the "whileXX" and vector comparison instructions have a throughput of
only one on that CPU, and if there is not enough computation between
the comparisons, it can cause the code to slow down.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D156112

Files:
  llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp


Index: llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
===================================================================
--- llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
+++ llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
@@ -3774,12 +3774,19 @@
   // Don't tail-fold for tight loops where we would be better off interleaving
   // with an unpredicated loop.
   unsigned NumInsns = 0;
+  unsigned NumComparisons = 0;
   for (BasicBlock *BB : TFI->LVL->getLoop()->blocks()) {
     NumInsns += BB->sizeWithoutDebug();
+    NumComparisons += count_if(
+        *BB, [](Instruction &I) { return isa<CmpInst, FCmpInst>(&I); });
   }
 
   // We expect 4 of these to be a IV PHI, IV add, IV compare and branch.
-  return NumInsns >= SVETailFoldInsnThreshold;
+  // If there is more than one comparison in the loop, increase the required
+  // number of instructions for predicated tail folding. This is because the
+  // throughput of comparison and `whileXX` instructions is only one, and
+  // insufficient computation between comparisons can slow down the code.
+  return NumInsns >= SVETailFoldInsnThreshold * NumComparisons;
 }
 
 InstructionCost


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