[llvm] 454bea0 - [X86] combineConcatVectorOps - add concat(psadbw(x,y),psadbw(z,w)) -> psadbw(concat(x,z),concat(y,w)) handling
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 24 03:34:43 PDT 2023
Author: Simon Pilgrim
Date: 2023-07-24T11:34:08+01:00
New Revision: 454bea07b21eca9782b63f8a5fbf56c388bd91d9
URL: https://github.com/llvm/llvm-project/commit/454bea07b21eca9782b63f8a5fbf56c388bd91d9
DIFF: https://github.com/llvm/llvm-project/commit/454bea07b21eca9782b63f8a5fbf56c388bd91d9.diff
LOG: [X86] combineConcatVectorOps - add concat(psadbw(x,y),psadbw(z,w)) -> psadbw(concat(x,z),concat(y,w)) handling
Added:
Modified:
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/vector-reduce-ctpop.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 180e83b28e13e8..7be328b978b30c 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -57304,11 +57304,15 @@ static SDValue combineConcatVectorOps(const SDLoc &DL, MVT VT,
}
break;
case X86ISD::PSHUFB:
+ case X86ISD::PSADBW:
if (!IsSplat && ((VT.is256BitVector() && Subtarget.hasInt256()) ||
(VT.is512BitVector() && Subtarget.useBWIRegs()))) {
+ MVT SrcVT = Op0.getOperand(0).getSimpleValueType();
+ SrcVT = MVT::getVectorVT(SrcVT.getScalarType(),
+ NumOps * SrcVT.getVectorNumElements());
return DAG.getNode(Op0.getOpcode(), DL, VT,
- ConcatSubOperand(VT, Ops, 0),
- ConcatSubOperand(VT, Ops, 1));
+ ConcatSubOperand(SrcVT, Ops, 0),
+ ConcatSubOperand(SrcVT, Ops, 1));
}
break;
case X86ISD::VPERMV:
diff --git a/llvm/test/CodeGen/X86/vector-reduce-ctpop.ll b/llvm/test/CodeGen/X86/vector-reduce-ctpop.ll
index c2b38dbf1483db..c2be962ac3fb60 100644
--- a/llvm/test/CodeGen/X86/vector-reduce-ctpop.ll
+++ b/llvm/test/CodeGen/X86/vector-reduce-ctpop.ll
@@ -1072,85 +1072,82 @@ define <8 x i32> @reduce_ctpop_v4i64_buildvector_v8i32(<4 x i64> %a0, <4 x i64>
; AVX512VL-NEXT: vpsrlw $4, %ymm0, %ymm0
; AVX512VL-NEXT: vpand %ymm0, %ymm8, %ymm0
; AVX512VL-NEXT: vpshufb %ymm0, %ymm10, %ymm0
-; AVX512VL-NEXT: vpaddb %ymm0, %ymm9, %ymm0
-; AVX512VL-NEXT: vpxor %xmm9, %xmm9, %xmm9
-; AVX512VL-NEXT: vpsadbw %ymm0, %ymm9, %ymm0
+; AVX512VL-NEXT: vpaddb %ymm0, %ymm9, %ymm9
+; AVX512VL-NEXT: vpxor %xmm0, %xmm0, %xmm0
+; AVX512VL-NEXT: vpsadbw %ymm0, %ymm9, %ymm9
; AVX512VL-NEXT: vpand %ymm1, %ymm8, %ymm11
; AVX512VL-NEXT: vpshufb %ymm11, %ymm10, %ymm11
; AVX512VL-NEXT: vpsrlw $4, %ymm1, %ymm1
; AVX512VL-NEXT: vpand %ymm1, %ymm8, %ymm1
; AVX512VL-NEXT: vpshufb %ymm1, %ymm10, %ymm1
; AVX512VL-NEXT: vpaddb %ymm1, %ymm11, %ymm1
-; AVX512VL-NEXT: vpsadbw %ymm1, %ymm9, %ymm1
+; AVX512VL-NEXT: vpsadbw %ymm0, %ymm1, %ymm1
; AVX512VL-NEXT: vpand %ymm2, %ymm8, %ymm11
; AVX512VL-NEXT: vpshufb %ymm11, %ymm10, %ymm11
; AVX512VL-NEXT: vpsrlw $4, %ymm2, %ymm2
; AVX512VL-NEXT: vpand %ymm2, %ymm8, %ymm2
; AVX512VL-NEXT: vpshufb %ymm2, %ymm10, %ymm2
; AVX512VL-NEXT: vpaddb %ymm2, %ymm11, %ymm2
-; AVX512VL-NEXT: vpsadbw %ymm2, %ymm9, %ymm2
+; AVX512VL-NEXT: vpsadbw %ymm0, %ymm2, %ymm2
; AVX512VL-NEXT: vpand %ymm3, %ymm8, %ymm11
; AVX512VL-NEXT: vpshufb %ymm11, %ymm10, %ymm11
; AVX512VL-NEXT: vpsrlw $4, %ymm3, %ymm3
; AVX512VL-NEXT: vpand %ymm3, %ymm8, %ymm3
; AVX512VL-NEXT: vpshufb %ymm3, %ymm10, %ymm3
; AVX512VL-NEXT: vpaddb %ymm3, %ymm11, %ymm3
-; AVX512VL-NEXT: vpsadbw %ymm3, %ymm9, %ymm3
+; AVX512VL-NEXT: vpsadbw %ymm0, %ymm3, %ymm3
; AVX512VL-NEXT: vpand %ymm4, %ymm8, %ymm11
; AVX512VL-NEXT: vpshufb %ymm11, %ymm10, %ymm11
; AVX512VL-NEXT: vpsrlw $4, %ymm4, %ymm4
; AVX512VL-NEXT: vpand %ymm4, %ymm8, %ymm4
; AVX512VL-NEXT: vpshufb %ymm4, %ymm10, %ymm4
; AVX512VL-NEXT: vpaddb %ymm4, %ymm11, %ymm4
-; AVX512VL-NEXT: vpsadbw %ymm4, %ymm9, %ymm4
+; AVX512VL-NEXT: vpsadbw %ymm0, %ymm4, %ymm4
; AVX512VL-NEXT: vpand %ymm5, %ymm8, %ymm11
; AVX512VL-NEXT: vpshufb %ymm11, %ymm10, %ymm11
; AVX512VL-NEXT: vpsrlw $4, %ymm5, %ymm5
; AVX512VL-NEXT: vpand %ymm5, %ymm8, %ymm5
; AVX512VL-NEXT: vpshufb %ymm5, %ymm10, %ymm5
; AVX512VL-NEXT: vpaddb %ymm5, %ymm11, %ymm5
-; AVX512VL-NEXT: vpsadbw %ymm5, %ymm9, %ymm5
+; AVX512VL-NEXT: vpsadbw %ymm0, %ymm5, %ymm5
; AVX512VL-NEXT: vpand %ymm6, %ymm8, %ymm11
; AVX512VL-NEXT: vpshufb %ymm11, %ymm10, %ymm11
; AVX512VL-NEXT: vpsrlw $4, %ymm6, %ymm6
; AVX512VL-NEXT: vpand %ymm6, %ymm8, %ymm6
; AVX512VL-NEXT: vpshufb %ymm6, %ymm10, %ymm6
; AVX512VL-NEXT: vpaddb %ymm6, %ymm11, %ymm6
-; AVX512VL-NEXT: vpsadbw %ymm6, %ymm9, %ymm6
+; AVX512VL-NEXT: vpsadbw %ymm0, %ymm6, %ymm6
; AVX512VL-NEXT: vpand %ymm7, %ymm8, %ymm11
; AVX512VL-NEXT: vpshufb %ymm11, %ymm10, %ymm11
; AVX512VL-NEXT: vpsrlw $4, %ymm7, %ymm7
; AVX512VL-NEXT: vpand %ymm7, %ymm8, %ymm7
; AVX512VL-NEXT: vpshufb %ymm7, %ymm10, %ymm7
; AVX512VL-NEXT: vpaddb %ymm7, %ymm11, %ymm7
-; AVX512VL-NEXT: vpsadbw %ymm7, %ymm9, %ymm7
-; AVX512VL-NEXT: vpmovqb %ymm0, %xmm0
-; AVX512VL-NEXT: vpxor %xmm8, %xmm8, %xmm8
-; AVX512VL-NEXT: vpsadbw %xmm0, %xmm8, %xmm0
+; AVX512VL-NEXT: vpsadbw %ymm0, %ymm7, %ymm7
+; AVX512VL-NEXT: vpmovqb %ymm9, %xmm8
+; AVX512VL-NEXT: vpxor %xmm9, %xmm9, %xmm9
+; AVX512VL-NEXT: vpsadbw %xmm9, %xmm8, %xmm8
; AVX512VL-NEXT: vpmovqb %ymm1, %xmm1
-; AVX512VL-NEXT: vpsadbw %xmm1, %xmm8, %xmm1
+; AVX512VL-NEXT: vpsadbw %xmm1, %xmm9, %xmm1
; AVX512VL-NEXT: vpmovqb %ymm2, %xmm2
-; AVX512VL-NEXT: vpsadbw %xmm2, %xmm8, %xmm2
; AVX512VL-NEXT: vpmovqb %ymm3, %xmm3
-; AVX512VL-NEXT: vpsadbw %xmm3, %xmm8, %xmm3
; AVX512VL-NEXT: vpmovqb %ymm4, %xmm4
-; AVX512VL-NEXT: vpsadbw %xmm4, %xmm8, %xmm4
; AVX512VL-NEXT: vpmovqb %ymm5, %xmm5
-; AVX512VL-NEXT: vpsadbw %xmm5, %xmm8, %xmm5
; AVX512VL-NEXT: vpmovqb %ymm6, %xmm6
-; AVX512VL-NEXT: vpsadbw %xmm6, %xmm8, %xmm6
; AVX512VL-NEXT: vpmovqb %ymm7, %xmm7
-; AVX512VL-NEXT: vpsadbw %xmm7, %xmm8, %xmm7
; AVX512VL-NEXT: vinserti128 $1, %xmm7, %ymm6, %ymm6
+; AVX512VL-NEXT: vpsadbw %ymm0, %ymm6, %ymm6
; AVX512VL-NEXT: vinserti128 $1, %xmm5, %ymm4, %ymm4
+; AVX512VL-NEXT: vpsadbw %ymm0, %ymm4, %ymm4
; AVX512VL-NEXT: vbroadcasti128 {{.*#+}} ymm5 = [0,4,8,12,0,4,8,12]
; AVX512VL-NEXT: # ymm5 = mem[0,1,0,1]
; AVX512VL-NEXT: vpermi2d %ymm6, %ymm4, %ymm5
-; AVX512VL-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
-; AVX512VL-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm1
+; AVX512VL-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm8[0],xmm1[0],xmm8[1],xmm1[1]
+; AVX512VL-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2
+; AVX512VL-NEXT: vpsadbw %ymm0, %ymm2, %ymm0
; AVX512VL-NEXT: vpbroadcastq {{.*#+}} xmm2 = [0,4,0,4]
-; AVX512VL-NEXT: vpermd %ymm1, %ymm2, %ymm1
-; AVX512VL-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]
+; AVX512VL-NEXT: vpermd %ymm0, %ymm2, %ymm0
+; AVX512VL-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]
; AVX512VL-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1,2,3],ymm5[4,5,6,7]
; AVX512VL-NEXT: retq
;
@@ -1170,28 +1167,26 @@ define <8 x i32> @reduce_ctpop_v4i64_buildvector_v8i32(<4 x i64> %a0, <4 x i64>
; AVX512VPOPCNT-NEXT: vpmovqb %ymm1, %xmm1
; AVX512VPOPCNT-NEXT: vpsadbw %xmm1, %xmm8, %xmm1
; AVX512VPOPCNT-NEXT: vpmovqb %ymm2, %xmm2
-; AVX512VPOPCNT-NEXT: vpsadbw %xmm2, %xmm8, %xmm2
; AVX512VPOPCNT-NEXT: vpmovqb %ymm3, %xmm3
-; AVX512VPOPCNT-NEXT: vpsadbw %xmm3, %xmm8, %xmm3
; AVX512VPOPCNT-NEXT: vpmovqb %ymm4, %xmm4
-; AVX512VPOPCNT-NEXT: vpsadbw %xmm4, %xmm8, %xmm4
; AVX512VPOPCNT-NEXT: vpmovqb %ymm5, %xmm5
-; AVX512VPOPCNT-NEXT: vpsadbw %xmm5, %xmm8, %xmm5
; AVX512VPOPCNT-NEXT: vpmovqb %ymm6, %xmm6
-; AVX512VPOPCNT-NEXT: vpsadbw %xmm6, %xmm8, %xmm6
; AVX512VPOPCNT-NEXT: vpmovqb %ymm7, %xmm7
-; AVX512VPOPCNT-NEXT: vpsadbw %xmm7, %xmm8, %xmm7
-; AVX512VPOPCNT-NEXT: vinserti128 $1, %xmm7, %ymm6, %ymm6
-; AVX512VPOPCNT-NEXT: vinserti128 $1, %xmm5, %ymm4, %ymm4
-; AVX512VPOPCNT-NEXT: vbroadcasti128 {{.*#+}} ymm5 = [0,4,8,12,0,4,8,12]
-; AVX512VPOPCNT-NEXT: # ymm5 = mem[0,1,0,1]
-; AVX512VPOPCNT-NEXT: vpermi2d %ymm6, %ymm4, %ymm5
; AVX512VPOPCNT-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
-; AVX512VPOPCNT-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm1
-; AVX512VPOPCNT-NEXT: vpbroadcastq {{.*#+}} xmm2 = [0,4,0,4]
-; AVX512VPOPCNT-NEXT: vpermd %ymm1, %ymm2, %ymm1
+; AVX512VPOPCNT-NEXT: vpbroadcastq {{.*#+}} xmm1 = [0,4,0,4]
+; AVX512VPOPCNT-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2
+; AVX512VPOPCNT-NEXT: vpxor %xmm3, %xmm3, %xmm3
+; AVX512VPOPCNT-NEXT: vpsadbw %ymm3, %ymm2, %ymm2
+; AVX512VPOPCNT-NEXT: vpermd %ymm2, %ymm1, %ymm1
; AVX512VPOPCNT-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]
-; AVX512VPOPCNT-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1,2,3],ymm5[4,5,6,7]
+; AVX512VPOPCNT-NEXT: vinserti128 $1, %xmm7, %ymm6, %ymm1
+; AVX512VPOPCNT-NEXT: vpsadbw %ymm3, %ymm1, %ymm1
+; AVX512VPOPCNT-NEXT: vinserti128 $1, %xmm5, %ymm4, %ymm2
+; AVX512VPOPCNT-NEXT: vpsadbw %ymm3, %ymm2, %ymm2
+; AVX512VPOPCNT-NEXT: vbroadcasti128 {{.*#+}} ymm3 = [0,4,8,12,0,4,8,12]
+; AVX512VPOPCNT-NEXT: # ymm3 = mem[0,1,0,1]
+; AVX512VPOPCNT-NEXT: vpermi2d %ymm1, %ymm2, %ymm3
+; AVX512VPOPCNT-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1,2,3],ymm3[4,5,6,7]
; AVX512VPOPCNT-NEXT: retq
%p0 = tail call <4 x i64> @llvm.ctpop.v4i64(<4 x i64> %a0)
%p1 = tail call <4 x i64> @llvm.ctpop.v4i64(<4 x i64> %a1)
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