[llvm] 90e08c2 - [LoongArch] Add test case showing suboptimal codegen when loading unsigned char/short

[Weining Lu via llvm-commits]

Author: WANG Rui
Date: 2023-07-24T17:48:16+08:00
New Revision: 90e08c260060b3cb0df31735117fd7d4331d9c64

URL: https://github.com/llvm/llvm-project/commit/90e08c260060b3cb0df31735117fd7d4331d9c64
DIFF: https://github.com/llvm/llvm-project/commit/90e08c260060b3cb0df31735117fd7d4331d9c64.diff

LOG: [LoongArch] Add test case showing suboptimal codegen when loading unsigned char/short

Implementing isZextFree will allow ld.bu or ld.hu to be selected rather than ld.b+mask and ld.h+mask.

Signed-off-by: WANG Rui <wangrui at loongson.cn>

Reviewed By: SixWeining, xen0n

Differential Revision: https://reviews.llvm.org/D154818

Added: 
    llvm/test/CodeGen/LoongArch/zext-with-load-is-free.ll

Modified: 
    

Removed: 
    


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diff  --git a/llvm/test/CodeGen/LoongArch/zext-with-load-is-free.ll b/llvm/test/CodeGen/LoongArch/zext-with-load-is-free.ll
new file mode 100644
index 00000000000000..e3b6b63d4f5911
--- /dev/null
+++ b/llvm/test/CodeGen/LoongArch/zext-with-load-is-free.ll
@@ -0,0 +1,44 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
+; RUN: llc --mtriple=loongarch32 -verify-machineinstrs < %s \
+; RUN:   | FileCheck %s --check-prefix=LA32
+; RUN: llc --mtriple=loongarch64 -verify-machineinstrs < %s \
+; RUN:   | FileCheck %s --check-prefix=LA64
+
+define zeroext i8 @test_zext_i8(ptr %p) nounwind {
+; LA32-LABEL: test_zext_i8:
+; LA32:       # %bb.0:
+; LA32-NEXT:    ld.b $a0, $a0, 0
+; LA32-NEXT:    andi $a0, $a0, 255
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: test_zext_i8:
+; LA64:       # %bb.0:
+; LA64-NEXT:    ld.b $a0, $a0, 0
+; LA64-NEXT:    andi $a0, $a0, 255
+; LA64-NEXT:    ret
+  %a = load i8, ptr %p, align 1
+  br label %exit
+exit:
+  ret i8 %a
+}
+
+define zeroext i16 @test_zext_i16(ptr %p) nounwind {
+; LA32-LABEL: test_zext_i16:
+; LA32:       # %bb.0:
+; LA32-NEXT:    ld.bu $a1, $a0, 0
+; LA32-NEXT:    ld.b $a0, $a0, 1
+; LA32-NEXT:    slli.w $a0, $a0, 8
+; LA32-NEXT:    or $a0, $a0, $a1
+; LA32-NEXT:    bstrpick.w $a0, $a0, 15, 0
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: test_zext_i16:
+; LA64:       # %bb.0:
+; LA64-NEXT:    ld.h $a0, $a0, 0
+; LA64-NEXT:    bstrpick.d $a0, $a0, 15, 0
+; LA64-NEXT:    ret
+  %a = load i16, ptr %p, align 1
+  br label %exit
+exit:
+  ret i16 %a
+}