[PATCH] D154810: [LoongArch][NFC] Add tests for (X & -256) == 256 -> (X >> 8) == 1

[Lu Weining via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG0cceea90bf59: [LoongArch][NFC] Add tests for (X & -256) == 256 -> (X >> 8) == 1 (authored by hev, committed by SixWeining).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D154810/new/

https://reviews.llvm.org/D154810

Files:
  llvm/test/CodeGen/LoongArch/legalicmpimm.ll


Index: llvm/test/CodeGen/LoongArch/legalicmpimm.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/LoongArch/legalicmpimm.ll
@@ -0,0 +1,28 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc --mtriple=loongarch32 < %s | FileCheck %s --check-prefix=LA32
+; RUN: llc --mtriple=loongarch64 < %s | FileCheck %s --check-prefix=LA64
+
+define i32 @icmpimm(i32 %x) {
+; LA32-LABEL: icmpimm:
+; LA32:       # %bb.0:
+; LA32-NEXT:    lu12i.w $a1, -1
+; LA32-NEXT:    and $a0, $a0, $a1
+; LA32-NEXT:    lu12i.w $a1, 1
+; LA32-NEXT:    xor $a0, $a0, $a1
+; LA32-NEXT:    sltui $a0, $a0, 1
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: icmpimm:
+; LA64:       # %bb.0:
+; LA64-NEXT:    lu12i.w $a1, -1
+; LA64-NEXT:    lu32i.d $a1, 0
+; LA64-NEXT:    and $a0, $a0, $a1
+; LA64-NEXT:    lu12i.w $a1, 1
+; LA64-NEXT:    xor $a0, $a0, $a1
+; LA64-NEXT:    sltui $a0, $a0, 1
+; LA64-NEXT:    ret
+  %1 = and i32 %x, -4096
+  %2 = icmp eq i32 %1, 4096
+  %3 = zext i1 %2 to i32
+  ret i32 %3
+}


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