[PATCH] D154488: [PowerPC] Define SchedModel for Power8

[ChenZheng via Phabricator via llvm-commits]

shchenz added a comment.

Please notice the 2 failures on two different bot in the premerge test.



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Comment at: llvm/lib/Target/PowerPC/PPCScheduleP8.td:50
+  def P8_FP_Scal : ProcResource<2> { let Super = P8_FPU; }
+  def P8_FP_2x64 : ProcResource<4> { let Super = P8_FPU; }
+  def P8_FP_4x32 : ProcResource<2> { let Super = P8_VMX; }
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Sorry, this still confuses me. The super is `P8_FPU` and `P8_FPU` has 4 execution units which can be executed as 2 way SIMD operation for double. So why we set the ProcResource value to 4 here?


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Comment at: llvm/lib/Target/PowerPC/PPCScheduleP8.td:51
+  def P8_FP_2x64 : ProcResource<4> { let Super = P8_FPU; }
+  def P8_FP_4x32 : ProcResource<2> { let Super = P8_VMX; }
 
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Setting `P8_VMX` as super of "4xSingle" also seems weird. In ISA of pwr8, I think most instructions that handle 4xSingle type are VSX related and from the UM "10.3.2 Instructional Latencies and Throughputs", I saw most of them are using pipeline `FPU`. So I guess, we should use `P8_FPU` as Super instead?


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Comment at: llvm/test/CodeGen/PowerPC/atomics-i16-ldst.ll:4517
 }
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; CHECK-P8: {{.*}}
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There are still unused check prefix in the run lines.


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Comment at: llvm/test/CodeGen/PowerPC/atomics-i32-ldst.ll:4777
 }
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; CHECK-P8: {{.*}}
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Please delete the unused check prefixes, so that we won't have this note.


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Comment at: llvm/test/CodeGen/PowerPC/atomics-i8-ldst.ll:4219
 }
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; CHECK-P8: {{.*}}
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shchenz wrote:
> Ditto
Please try to remove this NOTE.


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  https://reviews.llvm.org/D154488/new/

https://reviews.llvm.org/D154488