[llvm] b847fb8 - [X86] getIRStackGuard - remove else clause after return (style). NFC.
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sat Jul 15 07:58:47 PDT 2023
Author: Simon Pilgrim
Date: 2023-07-15T15:55:40+01:00
New Revision: b847fb88d9840c9f22cac694ed9b2975a29471cc
URL: https://github.com/llvm/llvm-project/commit/b847fb88d9840c9f22cac694ed9b2975a29471cc
DIFF: https://github.com/llvm/llvm-project/commit/b847fb88d9840c9f22cac694ed9b2975a29471cc.diff
LOG: [X86] getIRStackGuard - remove else clause after return (style). NFC.
Added:
Modified:
llvm/lib/Target/X86/X86ISelLowering.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index bd7b396947f682..cca87b87207159 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -3063,44 +3063,44 @@ Value *X86TargetLowering::getIRStackGuard(IRBuilderBase &IRB) const {
// tcbhead_t; use it instead of the usual global variable (see
// sysdeps/{i386,x86_64}/nptl/tls.h)
if (hasStackGuardSlotTLS(Subtarget.getTargetTriple())) {
- if (Subtarget.isTargetFuchsia()) {
- // <zircon/tls.h> defines ZX_TLS_STACK_GUARD_OFFSET with this value.
- return SegmentOffset(IRB, 0x10, getAddressSpace());
- } else {
- unsigned AddressSpace = getAddressSpace();
- Module *M = IRB.GetInsertBlock()->getParent()->getParent();
- // Specially, some users may customize the base reg and offset.
- int Offset = M->getStackProtectorGuardOffset();
- // If we don't set -stack-protector-guard-offset value:
- // %fs:0x28, unless we're using a Kernel code model, in which case
- // it's %gs:0x28. gs:0x14 on i386.
- if (Offset == INT_MAX)
- Offset = (Subtarget.is64Bit()) ? 0x28 : 0x14;
-
- StringRef GuardReg = M->getStackProtectorGuardReg();
- if (GuardReg == "fs")
- AddressSpace = X86AS::FS;
- else if (GuardReg == "gs")
- AddressSpace = X86AS::GS;
-
- // Use symbol guard if user specify.
- StringRef GuardSymb = M->getStackProtectorGuardSymbol();
- if (!GuardSymb.empty()) {
- GlobalVariable *GV = M->getGlobalVariable(GuardSymb);
- if (!GV) {
- Type *Ty = Subtarget.is64Bit() ? Type::getInt64Ty(M->getContext())
- : Type::getInt32Ty(M->getContext());
- GV = new GlobalVariable(*M, Ty, false, GlobalValue::ExternalLinkage,
- nullptr, GuardSymb, nullptr,
- GlobalValue::NotThreadLocal, AddressSpace);
- if (!Subtarget.isTargetDarwin())
- GV->setDSOLocal(M->getDirectAccessExternalData());
- }
- return GV;
- }
-
- return SegmentOffset(IRB, Offset, AddressSpace);
- }
+ unsigned AddressSpace = getAddressSpace();
+
+ // <zircon/tls.h> defines ZX_TLS_STACK_GUARD_OFFSET with this value.
+ if (Subtarget.isTargetFuchsia())
+ return SegmentOffset(IRB, 0x10, AddressSpace);
+
+ Module *M = IRB.GetInsertBlock()->getParent()->getParent();
+ // Specially, some users may customize the base reg and offset.
+ int Offset = M->getStackProtectorGuardOffset();
+ // If we don't set -stack-protector-guard-offset value:
+ // %fs:0x28, unless we're using a Kernel code model, in which case
+ // it's %gs:0x28. gs:0x14 on i386.
+ if (Offset == INT_MAX)
+ Offset = (Subtarget.is64Bit()) ? 0x28 : 0x14;
+
+ StringRef GuardReg = M->getStackProtectorGuardReg();
+ if (GuardReg == "fs")
+ AddressSpace = X86AS::FS;
+ else if (GuardReg == "gs")
+ AddressSpace = X86AS::GS;
+
+ // Use symbol guard if user specify.
+ StringRef GuardSymb = M->getStackProtectorGuardSymbol();
+ if (!GuardSymb.empty()) {
+ GlobalVariable *GV = M->getGlobalVariable(GuardSymb);
+ if (!GV) {
+ Type *Ty = Subtarget.is64Bit() ? Type::getInt64Ty(M->getContext())
+ : Type::getInt32Ty(M->getContext());
+ GV = new GlobalVariable(*M, Ty, false, GlobalValue::ExternalLinkage,
+ nullptr, GuardSymb, nullptr,
+ GlobalValue::NotThreadLocal, AddressSpace);
+ if (!Subtarget.isTargetDarwin())
+ GV->setDSOLocal(M->getDirectAccessExternalData());
+ }
+ return GV;
+ }
+
+ return SegmentOffset(IRB, Offset, AddressSpace);
}
return TargetLowering::getIRStackGuard(IRB);
}
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