[llvm] 4dc5662 - [Attributor][NFC] Update all tests with the script
Johannes Doerfert via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 14 13:54:58 PDT 2023
Author: Johannes Doerfert
Date: 2023-07-14T13:53:38-07:00
New Revision: 4dc5662c27d57bd66f15962e785aa309a39d10b3
URL: https://github.com/llvm/llvm-project/commit/4dc5662c27d57bd66f15962e785aa309a39d10b3
DIFF: https://github.com/llvm/llvm-project/commit/4dc5662c27d57bd66f15962e785aa309a39d10b3.diff
LOG: [Attributor][NFC] Update all tests with the script
Three tests needed manual adjustment after
https://reviews.llvm.org/D148216 got reverted. See
https://github.com/llvm/llvm-project/issues/63746.
Added:
Modified:
llvm/test/Transforms/Attributor/ArgumentPromotion/2008-02-01-ReturnAttrs.ll
llvm/test/Transforms/Attributor/ArgumentPromotion/X86/attributes.ll
llvm/test/Transforms/Attributor/ArgumentPromotion/X86/min-legal-vector-width.ll
llvm/test/Transforms/Attributor/ArgumentPromotion/attrs.ll
llvm/test/Transforms/Attributor/ArgumentPromotion/byval-2.ll
llvm/test/Transforms/Attributor/ArgumentPromotion/byval.ll
llvm/test/Transforms/Attributor/ArgumentPromotion/crash.ll
llvm/test/Transforms/Attributor/IPConstantProp/2009-09-24-byval-ptr.ll
llvm/test/Transforms/Attributor/IPConstantProp/PR43857.ll
llvm/test/Transforms/Attributor/IPConstantProp/openmp_parallel_for.ll
llvm/test/Transforms/Attributor/IPConstantProp/thread_local_acs.ll
llvm/test/Transforms/Attributor/address_space_info.ll
llvm/test/Transforms/Attributor/dereferenceable-1.ll
llvm/test/Transforms/Attributor/memory_locations.ll
llvm/test/Transforms/Attributor/nocapture-1.ll
llvm/test/Transforms/Attributor/nofpclass.ll
llvm/test/Transforms/Attributor/nonnull.ll
llvm/test/Transforms/Attributor/range.ll
llvm/test/Transforms/Attributor/value-simplify-local-remote.ll
llvm/test/Transforms/Attributor/willreturn.ll
llvm/test/Transforms/OpenMP/value-simplify-openmp-opt.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/Attributor/ArgumentPromotion/2008-02-01-ReturnAttrs.ll b/llvm/test/Transforms/Attributor/ArgumentPromotion/2008-02-01-ReturnAttrs.ll
index a51cf68b9dd039..1815e80df37596 100644
--- a/llvm/test/Transforms/Attributor/ArgumentPromotion/2008-02-01-ReturnAttrs.ll
+++ b/llvm/test/Transforms/Attributor/ArgumentPromotion/2008-02-01-ReturnAttrs.ll
@@ -9,8 +9,8 @@ define internal i32 @deref(ptr %x) nounwind {
; CGSCC-NEXT: entry:
; CGSCC-NEXT: [[X_PRIV:%.*]] = alloca i32, align 4
; CGSCC-NEXT: store i32 [[TMP0]], ptr [[X_PRIV]], align 4
-; CGSCC-NEXT: [[TMP2:%.*]] = load i32, ptr [[X_PRIV]], align 4
-; CGSCC-NEXT: ret i32 [[TMP2]]
+; CGSCC-NEXT: [[TRUETMP2:%.*]] = load i32, ptr [[X_PRIV]], align 4
+; CGSCC-NEXT: ret i32 [[TRUETMP2]]
;
entry:
%tmp2 = load i32, ptr %x, align 4
@@ -32,8 +32,8 @@ define i32 @f(i32 %x) {
; CGSCC-NEXT: entry:
; CGSCC-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4
; CGSCC-NEXT: store i32 [[X]], ptr [[X_ADDR]], align 4
-; CGSCC-NEXT: [[TMP1:%.*]] = call i32 @deref(i32 [[X]]) #[[ATTR2:[0-9]+]]
-; CGSCC-NEXT: ret i32 [[TMP1]]
+; CGSCC-NEXT: [[TRUETMP1:%.*]] = call i32 @deref(i32 [[X]]) #[[ATTR2:[0-9]+]]
+; CGSCC-NEXT: ret i32 [[TRUETMP1]]
;
entry:
%x_addr = alloca i32
diff --git a/llvm/test/Transforms/Attributor/ArgumentPromotion/X86/attributes.ll b/llvm/test/Transforms/Attributor/ArgumentPromotion/X86/attributes.ll
index 23415d3d3262bc..71e8bd11e9c769 100644
--- a/llvm/test/Transforms/Attributor/ArgumentPromotion/X86/attributes.ll
+++ b/llvm/test/Transforms/Attributor/ArgumentPromotion/X86/attributes.ll
@@ -27,11 +27,11 @@ define void @no_promote(ptr %arg) #1 {
; TUNIT-SAME: (ptr nocapture nofree writeonly [[ARG:%.*]]) #[[ATTR1:[0-9]+]] {
; TUNIT-NEXT: bb:
; TUNIT-NEXT: [[TMP:%.*]] = alloca <4 x i64>, align 32
-; TUNIT-NEXT: [[TMP2:%.*]] = alloca <4 x i64>, align 32
+; TUNIT-NEXT: [[TRUETMP2:%.*]] = alloca <4 x i64>, align 32
; TUNIT-NEXT: call void @llvm.memset.p0.i64(ptr noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP]], i8 noundef 0, i64 noundef 32, i1 noundef false) #[[ATTR3:[0-9]+]]
-; TUNIT-NEXT: call fastcc void @no_promote_avx2(ptr noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP2]], ptr noalias nocapture nofree noundef nonnull readonly align 32 dereferenceable(32) [[TMP]]) #[[ATTR4:[0-9]+]]
-; TUNIT-NEXT: [[TMP4:%.*]] = load <4 x i64>, ptr [[TMP2]], align 32
-; TUNIT-NEXT: store <4 x i64> [[TMP4]], ptr [[ARG]], align 2
+; TUNIT-NEXT: call fastcc void @no_promote_avx2(ptr noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TRUETMP2]], ptr noalias nocapture nofree noundef nonnull readonly align 32 dereferenceable(32) [[TMP]]) #[[ATTR4:[0-9]+]]
+; TUNIT-NEXT: [[TRUETMP4:%.*]] = load <4 x i64>, ptr [[TRUETMP2]], align 32
+; TUNIT-NEXT: store <4 x i64> [[TRUETMP4]], ptr [[ARG]], align 2
; TUNIT-NEXT: ret void
;
; CGSCC: Function Attrs: mustprogress nofree nosync nounwind willreturn memory(argmem: readwrite) uwtable
@@ -39,11 +39,11 @@ define void @no_promote(ptr %arg) #1 {
; CGSCC-SAME: (ptr nocapture nofree noundef nonnull writeonly align 2 dereferenceable(32) [[ARG:%.*]]) #[[ATTR1:[0-9]+]] {
; CGSCC-NEXT: bb:
; CGSCC-NEXT: [[TMP:%.*]] = alloca <4 x i64>, align 32
-; CGSCC-NEXT: [[TMP2:%.*]] = alloca <4 x i64>, align 32
+; CGSCC-NEXT: [[TRUETMP2:%.*]] = alloca <4 x i64>, align 32
; CGSCC-NEXT: call void @llvm.memset.p0.i64(ptr noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP]], i8 noundef 0, i64 noundef 32, i1 noundef false) #[[ATTR3:[0-9]+]]
-; CGSCC-NEXT: call fastcc void @no_promote_avx2(ptr noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP2]], ptr noalias nocapture nofree noundef nonnull readonly align 32 dereferenceable(32) [[TMP]]) #[[ATTR4:[0-9]+]]
-; CGSCC-NEXT: [[TMP4:%.*]] = load <4 x i64>, ptr [[TMP2]], align 32
-; CGSCC-NEXT: store <4 x i64> [[TMP4]], ptr [[ARG]], align 2
+; CGSCC-NEXT: call fastcc void @no_promote_avx2(ptr noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TRUETMP2]], ptr noalias nocapture nofree noundef nonnull readonly align 32 dereferenceable(32) [[TMP]]) #[[ATTR4:[0-9]+]]
+; CGSCC-NEXT: [[TRUETMP4:%.*]] = load <4 x i64>, ptr [[TRUETMP2]], align 32
+; CGSCC-NEXT: store <4 x i64> [[TRUETMP4]], ptr [[ARG]], align 2
; CGSCC-NEXT: ret void
;
bb:
@@ -79,12 +79,12 @@ define void @promote(ptr %arg) #0 {
; TUNIT-SAME: (ptr nocapture nofree writeonly [[ARG:%.*]]) #[[ATTR0]] {
; TUNIT-NEXT: bb:
; TUNIT-NEXT: [[TMP:%.*]] = alloca <4 x i64>, align 32
-; TUNIT-NEXT: [[TMP2:%.*]] = alloca <4 x i64>, align 32
+; TUNIT-NEXT: [[TRUETMP2:%.*]] = alloca <4 x i64>, align 32
; TUNIT-NEXT: call void @llvm.memset.p0.i64(ptr noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP]], i8 noundef 0, i64 noundef 32, i1 noundef false) #[[ATTR3]]
; TUNIT-NEXT: [[TMP0:%.*]] = load <4 x i64>, ptr [[TMP]], align 32
-; TUNIT-NEXT: call fastcc void @promote_avx2(ptr noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP2]], <4 x i64> [[TMP0]]) #[[ATTR4]]
-; TUNIT-NEXT: [[TMP4:%.*]] = load <4 x i64>, ptr [[TMP2]], align 32
-; TUNIT-NEXT: store <4 x i64> [[TMP4]], ptr [[ARG]], align 2
+; TUNIT-NEXT: call fastcc void @promote_avx2(ptr noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TRUETMP2]], <4 x i64> [[TMP0]]) #[[ATTR4]]
+; TUNIT-NEXT: [[TRUETMP4:%.*]] = load <4 x i64>, ptr [[TRUETMP2]], align 32
+; TUNIT-NEXT: store <4 x i64> [[TRUETMP4]], ptr [[ARG]], align 2
; TUNIT-NEXT: ret void
;
; CGSCC: Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable
@@ -92,12 +92,12 @@ define void @promote(ptr %arg) #0 {
; CGSCC-SAME: (ptr nocapture nofree noundef nonnull writeonly align 2 dereferenceable(32) [[ARG:%.*]]) #[[ATTR0]] {
; CGSCC-NEXT: bb:
; CGSCC-NEXT: [[TMP:%.*]] = alloca <4 x i64>, align 32
-; CGSCC-NEXT: [[TMP2:%.*]] = alloca <4 x i64>, align 32
+; CGSCC-NEXT: [[TRUETMP2:%.*]] = alloca <4 x i64>, align 32
; CGSCC-NEXT: call void @llvm.memset.p0.i64(ptr noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP]], i8 noundef 0, i64 noundef 32, i1 noundef false) #[[ATTR3]]
; CGSCC-NEXT: [[TMP0:%.*]] = load <4 x i64>, ptr [[TMP]], align 32
-; CGSCC-NEXT: call fastcc void @promote_avx2(ptr noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TMP2]], <4 x i64> [[TMP0]]) #[[ATTR4]]
-; CGSCC-NEXT: [[TMP4:%.*]] = load <4 x i64>, ptr [[TMP2]], align 32
-; CGSCC-NEXT: store <4 x i64> [[TMP4]], ptr [[ARG]], align 2
+; CGSCC-NEXT: call fastcc void @promote_avx2(ptr noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(32) [[TRUETMP2]], <4 x i64> [[TMP0]]) #[[ATTR4]]
+; CGSCC-NEXT: [[TRUETMP4:%.*]] = load <4 x i64>, ptr [[TRUETMP2]], align 32
+; CGSCC-NEXT: store <4 x i64> [[TRUETMP4]], ptr [[ARG]], align 2
; CGSCC-NEXT: ret void
;
bb:
diff --git a/llvm/test/Transforms/Attributor/ArgumentPromotion/X86/min-legal-vector-width.ll b/llvm/test/Transforms/Attributor/ArgumentPromotion/X86/min-legal-vector-width.ll
index f0bcf68b6444b6..321714849c8555 100644
--- a/llvm/test/Transforms/Attributor/ArgumentPromotion/X86/min-legal-vector-width.ll
+++ b/llvm/test/Transforms/Attributor/ArgumentPromotion/X86/min-legal-vector-width.ll
@@ -32,12 +32,12 @@ define void @avx512_legal512_prefer512_call_avx512_legal512_prefer512(ptr %arg)
; TUNIT-SAME: (ptr nocapture nofree writeonly [[ARG:%.*]]) #[[ATTR0]] {
; TUNIT-NEXT: bb:
; TUNIT-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
-; TUNIT-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
+; TUNIT-NEXT: [[TRUETMP2:%.*]] = alloca <8 x i64>, align 32
; TUNIT-NEXT: call void @llvm.memset.p0.i64(ptr noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(64) [[TMP]], i8 noundef 0, i64 noundef 32, i1 noundef false) #[[ATTR5:[0-9]+]]
; TUNIT-NEXT: [[TMP0:%.*]] = load <8 x i64>, ptr [[TMP]], align 64
-; TUNIT-NEXT: call fastcc void @callee_avx512_legal512_prefer512_call_avx512_legal512_prefer512(ptr noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]]) #[[ATTR6:[0-9]+]]
-; TUNIT-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr [[TMP2]], align 64
-; TUNIT-NEXT: store <8 x i64> [[TMP4]], ptr [[ARG]], align 2
+; TUNIT-NEXT: call fastcc void @callee_avx512_legal512_prefer512_call_avx512_legal512_prefer512(ptr noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TRUETMP2]], <8 x i64> [[TMP0]]) #[[ATTR6:[0-9]+]]
+; TUNIT-NEXT: [[TRUETMP4:%.*]] = load <8 x i64>, ptr [[TRUETMP2]], align 64
+; TUNIT-NEXT: store <8 x i64> [[TRUETMP4]], ptr [[ARG]], align 2
; TUNIT-NEXT: ret void
;
; CGSCC: Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable
@@ -45,12 +45,12 @@ define void @avx512_legal512_prefer512_call_avx512_legal512_prefer512(ptr %arg)
; CGSCC-SAME: (ptr nocapture nofree noundef nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) #[[ATTR0]] {
; CGSCC-NEXT: bb:
; CGSCC-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
-; CGSCC-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
+; CGSCC-NEXT: [[TRUETMP2:%.*]] = alloca <8 x i64>, align 32
; CGSCC-NEXT: call void @llvm.memset.p0.i64(ptr noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP]], i8 noundef 0, i64 noundef 32, i1 noundef false) #[[ATTR5:[0-9]+]]
; CGSCC-NEXT: [[TMP0:%.*]] = load <8 x i64>, ptr [[TMP]], align 64
-; CGSCC-NEXT: call fastcc void @callee_avx512_legal512_prefer512_call_avx512_legal512_prefer512(ptr noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]]) #[[ATTR6:[0-9]+]]
-; CGSCC-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr [[TMP2]], align 64
-; CGSCC-NEXT: store <8 x i64> [[TMP4]], ptr [[ARG]], align 2
+; CGSCC-NEXT: call fastcc void @callee_avx512_legal512_prefer512_call_avx512_legal512_prefer512(ptr noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TRUETMP2]], <8 x i64> [[TMP0]]) #[[ATTR6:[0-9]+]]
+; CGSCC-NEXT: [[TRUETMP4:%.*]] = load <8 x i64>, ptr [[TRUETMP2]], align 64
+; CGSCC-NEXT: store <8 x i64> [[TRUETMP4]], ptr [[ARG]], align 2
; CGSCC-NEXT: ret void
;
bb:
@@ -89,12 +89,12 @@ define void @avx512_legal512_prefer256_call_avx512_legal512_prefer256(ptr %arg)
; TUNIT-SAME: (ptr nocapture nofree writeonly [[ARG:%.*]]) #[[ATTR1]] {
; TUNIT-NEXT: bb:
; TUNIT-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
-; TUNIT-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
+; TUNIT-NEXT: [[TRUETMP2:%.*]] = alloca <8 x i64>, align 32
; TUNIT-NEXT: call void @llvm.memset.p0.i64(ptr noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(64) [[TMP]], i8 noundef 0, i64 noundef 32, i1 noundef false) #[[ATTR5]]
; TUNIT-NEXT: [[TMP0:%.*]] = load <8 x i64>, ptr [[TMP]], align 64
-; TUNIT-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal512_prefer256(ptr noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]]) #[[ATTR6]]
-; TUNIT-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr [[TMP2]], align 64
-; TUNIT-NEXT: store <8 x i64> [[TMP4]], ptr [[ARG]], align 2
+; TUNIT-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal512_prefer256(ptr noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TRUETMP2]], <8 x i64> [[TMP0]]) #[[ATTR6]]
+; TUNIT-NEXT: [[TRUETMP4:%.*]] = load <8 x i64>, ptr [[TRUETMP2]], align 64
+; TUNIT-NEXT: store <8 x i64> [[TRUETMP4]], ptr [[ARG]], align 2
; TUNIT-NEXT: ret void
;
; CGSCC: Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable
@@ -102,12 +102,12 @@ define void @avx512_legal512_prefer256_call_avx512_legal512_prefer256(ptr %arg)
; CGSCC-SAME: (ptr nocapture nofree noundef nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) #[[ATTR1]] {
; CGSCC-NEXT: bb:
; CGSCC-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
-; CGSCC-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
+; CGSCC-NEXT: [[TRUETMP2:%.*]] = alloca <8 x i64>, align 32
; CGSCC-NEXT: call void @llvm.memset.p0.i64(ptr noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP]], i8 noundef 0, i64 noundef 32, i1 noundef false) #[[ATTR5]]
; CGSCC-NEXT: [[TMP0:%.*]] = load <8 x i64>, ptr [[TMP]], align 64
-; CGSCC-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal512_prefer256(ptr noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]]) #[[ATTR6]]
-; CGSCC-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr [[TMP2]], align 64
-; CGSCC-NEXT: store <8 x i64> [[TMP4]], ptr [[ARG]], align 2
+; CGSCC-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal512_prefer256(ptr noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TRUETMP2]], <8 x i64> [[TMP0]]) #[[ATTR6]]
+; CGSCC-NEXT: [[TRUETMP4:%.*]] = load <8 x i64>, ptr [[TRUETMP2]], align 64
+; CGSCC-NEXT: store <8 x i64> [[TRUETMP4]], ptr [[ARG]], align 2
; CGSCC-NEXT: ret void
;
bb:
@@ -146,12 +146,12 @@ define void @avx512_legal512_prefer512_call_avx512_legal512_prefer256(ptr %arg)
; TUNIT-SAME: (ptr nocapture nofree writeonly [[ARG:%.*]]) #[[ATTR0]] {
; TUNIT-NEXT: bb:
; TUNIT-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
-; TUNIT-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
+; TUNIT-NEXT: [[TRUETMP2:%.*]] = alloca <8 x i64>, align 32
; TUNIT-NEXT: call void @llvm.memset.p0.i64(ptr noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(64) [[TMP]], i8 noundef 0, i64 noundef 32, i1 noundef false) #[[ATTR5]]
; TUNIT-NEXT: [[TMP0:%.*]] = load <8 x i64>, ptr [[TMP]], align 64
-; TUNIT-NEXT: call fastcc void @callee_avx512_legal512_prefer512_call_avx512_legal512_prefer256(ptr noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]]) #[[ATTR6]]
-; TUNIT-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr [[TMP2]], align 64
-; TUNIT-NEXT: store <8 x i64> [[TMP4]], ptr [[ARG]], align 2
+; TUNIT-NEXT: call fastcc void @callee_avx512_legal512_prefer512_call_avx512_legal512_prefer256(ptr noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TRUETMP2]], <8 x i64> [[TMP0]]) #[[ATTR6]]
+; TUNIT-NEXT: [[TRUETMP4:%.*]] = load <8 x i64>, ptr [[TRUETMP2]], align 64
+; TUNIT-NEXT: store <8 x i64> [[TRUETMP4]], ptr [[ARG]], align 2
; TUNIT-NEXT: ret void
;
; CGSCC: Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable
@@ -159,12 +159,12 @@ define void @avx512_legal512_prefer512_call_avx512_legal512_prefer256(ptr %arg)
; CGSCC-SAME: (ptr nocapture nofree noundef nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) #[[ATTR0]] {
; CGSCC-NEXT: bb:
; CGSCC-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
-; CGSCC-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
+; CGSCC-NEXT: [[TRUETMP2:%.*]] = alloca <8 x i64>, align 32
; CGSCC-NEXT: call void @llvm.memset.p0.i64(ptr noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP]], i8 noundef 0, i64 noundef 32, i1 noundef false) #[[ATTR5]]
; CGSCC-NEXT: [[TMP0:%.*]] = load <8 x i64>, ptr [[TMP]], align 64
-; CGSCC-NEXT: call fastcc void @callee_avx512_legal512_prefer512_call_avx512_legal512_prefer256(ptr noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]]) #[[ATTR6]]
-; CGSCC-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr [[TMP2]], align 64
-; CGSCC-NEXT: store <8 x i64> [[TMP4]], ptr [[ARG]], align 2
+; CGSCC-NEXT: call fastcc void @callee_avx512_legal512_prefer512_call_avx512_legal512_prefer256(ptr noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TRUETMP2]], <8 x i64> [[TMP0]]) #[[ATTR6]]
+; CGSCC-NEXT: [[TRUETMP4:%.*]] = load <8 x i64>, ptr [[TRUETMP2]], align 64
+; CGSCC-NEXT: store <8 x i64> [[TRUETMP4]], ptr [[ARG]], align 2
; CGSCC-NEXT: ret void
;
bb:
@@ -203,12 +203,12 @@ define void @avx512_legal512_prefer256_call_avx512_legal512_prefer512(ptr %arg)
; TUNIT-SAME: (ptr nocapture nofree writeonly [[ARG:%.*]]) #[[ATTR1]] {
; TUNIT-NEXT: bb:
; TUNIT-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
-; TUNIT-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
+; TUNIT-NEXT: [[TRUETMP2:%.*]] = alloca <8 x i64>, align 32
; TUNIT-NEXT: call void @llvm.memset.p0.i64(ptr noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(64) [[TMP]], i8 noundef 0, i64 noundef 32, i1 noundef false) #[[ATTR5]]
; TUNIT-NEXT: [[TMP0:%.*]] = load <8 x i64>, ptr [[TMP]], align 64
-; TUNIT-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal512_prefer512(ptr noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]]) #[[ATTR6]]
-; TUNIT-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr [[TMP2]], align 64
-; TUNIT-NEXT: store <8 x i64> [[TMP4]], ptr [[ARG]], align 2
+; TUNIT-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal512_prefer512(ptr noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TRUETMP2]], <8 x i64> [[TMP0]]) #[[ATTR6]]
+; TUNIT-NEXT: [[TRUETMP4:%.*]] = load <8 x i64>, ptr [[TRUETMP2]], align 64
+; TUNIT-NEXT: store <8 x i64> [[TRUETMP4]], ptr [[ARG]], align 2
; TUNIT-NEXT: ret void
;
; CGSCC: Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable
@@ -216,12 +216,12 @@ define void @avx512_legal512_prefer256_call_avx512_legal512_prefer512(ptr %arg)
; CGSCC-SAME: (ptr nocapture nofree noundef nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) #[[ATTR1]] {
; CGSCC-NEXT: bb:
; CGSCC-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
-; CGSCC-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
+; CGSCC-NEXT: [[TRUETMP2:%.*]] = alloca <8 x i64>, align 32
; CGSCC-NEXT: call void @llvm.memset.p0.i64(ptr noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP]], i8 noundef 0, i64 noundef 32, i1 noundef false) #[[ATTR5]]
; CGSCC-NEXT: [[TMP0:%.*]] = load <8 x i64>, ptr [[TMP]], align 64
-; CGSCC-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal512_prefer512(ptr noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]]) #[[ATTR6]]
-; CGSCC-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr [[TMP2]], align 64
-; CGSCC-NEXT: store <8 x i64> [[TMP4]], ptr [[ARG]], align 2
+; CGSCC-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal512_prefer512(ptr noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TRUETMP2]], <8 x i64> [[TMP0]]) #[[ATTR6]]
+; CGSCC-NEXT: [[TRUETMP4:%.*]] = load <8 x i64>, ptr [[TRUETMP2]], align 64
+; CGSCC-NEXT: store <8 x i64> [[TRUETMP4]], ptr [[ARG]], align 2
; CGSCC-NEXT: ret void
;
bb:
@@ -258,11 +258,11 @@ define void @avx512_legal256_prefer256_call_avx512_legal512_prefer256(ptr %arg)
; TUNIT-SAME: (ptr nocapture nofree writeonly [[ARG:%.*]]) #[[ATTR2:[0-9]+]] {
; TUNIT-NEXT: bb:
; TUNIT-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
-; TUNIT-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
+; TUNIT-NEXT: [[TRUETMP2:%.*]] = alloca <8 x i64>, align 32
; TUNIT-NEXT: call void @llvm.memset.p0.i64(ptr noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(64) [[TMP]], i8 noundef 0, i64 noundef 32, i1 noundef false) #[[ATTR5]]
-; TUNIT-NEXT: call fastcc void @callee_avx512_legal256_prefer256_call_avx512_legal512_prefer256(ptr noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], ptr noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) #[[ATTR6]]
-; TUNIT-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr [[TMP2]], align 64
-; TUNIT-NEXT: store <8 x i64> [[TMP4]], ptr [[ARG]], align 2
+; TUNIT-NEXT: call fastcc void @callee_avx512_legal256_prefer256_call_avx512_legal512_prefer256(ptr noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TRUETMP2]], ptr noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) #[[ATTR6]]
+; TUNIT-NEXT: [[TRUETMP4:%.*]] = load <8 x i64>, ptr [[TRUETMP2]], align 64
+; TUNIT-NEXT: store <8 x i64> [[TRUETMP4]], ptr [[ARG]], align 2
; TUNIT-NEXT: ret void
;
; CGSCC: Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable
@@ -270,11 +270,11 @@ define void @avx512_legal256_prefer256_call_avx512_legal512_prefer256(ptr %arg)
; CGSCC-SAME: (ptr nocapture nofree noundef nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) #[[ATTR2:[0-9]+]] {
; CGSCC-NEXT: bb:
; CGSCC-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
-; CGSCC-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
+; CGSCC-NEXT: [[TRUETMP2:%.*]] = alloca <8 x i64>, align 32
; CGSCC-NEXT: call void @llvm.memset.p0.i64(ptr noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP]], i8 noundef 0, i64 noundef 32, i1 noundef false) #[[ATTR5]]
-; CGSCC-NEXT: call fastcc void @callee_avx512_legal256_prefer256_call_avx512_legal512_prefer256(ptr noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], ptr noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) #[[ATTR6]]
-; CGSCC-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr [[TMP2]], align 64
-; CGSCC-NEXT: store <8 x i64> [[TMP4]], ptr [[ARG]], align 2
+; CGSCC-NEXT: call fastcc void @callee_avx512_legal256_prefer256_call_avx512_legal512_prefer256(ptr noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TRUETMP2]], ptr noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) #[[ATTR6]]
+; CGSCC-NEXT: [[TRUETMP4:%.*]] = load <8 x i64>, ptr [[TRUETMP2]], align 64
+; CGSCC-NEXT: store <8 x i64> [[TRUETMP4]], ptr [[ARG]], align 2
; CGSCC-NEXT: ret void
;
bb:
@@ -311,11 +311,11 @@ define void @avx512_legal512_prefer256_call_avx512_legal256_prefer256(ptr %arg)
; TUNIT-SAME: (ptr nocapture nofree writeonly [[ARG:%.*]]) #[[ATTR1]] {
; TUNIT-NEXT: bb:
; TUNIT-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
-; TUNIT-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
+; TUNIT-NEXT: [[TRUETMP2:%.*]] = alloca <8 x i64>, align 32
; TUNIT-NEXT: call void @llvm.memset.p0.i64(ptr noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(64) [[TMP]], i8 noundef 0, i64 noundef 32, i1 noundef false) #[[ATTR5]]
-; TUNIT-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal256_prefer256(ptr noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], ptr noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) #[[ATTR6]]
-; TUNIT-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr [[TMP2]], align 64
-; TUNIT-NEXT: store <8 x i64> [[TMP4]], ptr [[ARG]], align 2
+; TUNIT-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal256_prefer256(ptr noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TRUETMP2]], ptr noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) #[[ATTR6]]
+; TUNIT-NEXT: [[TRUETMP4:%.*]] = load <8 x i64>, ptr [[TRUETMP2]], align 64
+; TUNIT-NEXT: store <8 x i64> [[TRUETMP4]], ptr [[ARG]], align 2
; TUNIT-NEXT: ret void
;
; CGSCC: Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable
@@ -323,11 +323,11 @@ define void @avx512_legal512_prefer256_call_avx512_legal256_prefer256(ptr %arg)
; CGSCC-SAME: (ptr nocapture nofree noundef nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) #[[ATTR1]] {
; CGSCC-NEXT: bb:
; CGSCC-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
-; CGSCC-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
+; CGSCC-NEXT: [[TRUETMP2:%.*]] = alloca <8 x i64>, align 32
; CGSCC-NEXT: call void @llvm.memset.p0.i64(ptr noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP]], i8 noundef 0, i64 noundef 32, i1 noundef false) #[[ATTR5]]
-; CGSCC-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal256_prefer256(ptr noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], ptr noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) #[[ATTR6]]
-; CGSCC-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr [[TMP2]], align 64
-; CGSCC-NEXT: store <8 x i64> [[TMP4]], ptr [[ARG]], align 2
+; CGSCC-NEXT: call fastcc void @callee_avx512_legal512_prefer256_call_avx512_legal256_prefer256(ptr noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TRUETMP2]], ptr noalias nocapture nofree noundef nonnull readonly align 64 dereferenceable(64) [[TMP]]) #[[ATTR6]]
+; CGSCC-NEXT: [[TRUETMP4:%.*]] = load <8 x i64>, ptr [[TRUETMP2]], align 64
+; CGSCC-NEXT: store <8 x i64> [[TRUETMP4]], ptr [[ARG]], align 2
; CGSCC-NEXT: ret void
;
bb:
@@ -366,12 +366,12 @@ define void @avx2_legal256_prefer256_call_avx2_legal512_prefer256(ptr %arg) #4 {
; TUNIT-SAME: (ptr nocapture nofree writeonly [[ARG:%.*]]) #[[ATTR3]] {
; TUNIT-NEXT: bb:
; TUNIT-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
-; TUNIT-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
+; TUNIT-NEXT: [[TRUETMP2:%.*]] = alloca <8 x i64>, align 32
; TUNIT-NEXT: call void @llvm.memset.p0.i64(ptr noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(64) [[TMP]], i8 noundef 0, i64 noundef 32, i1 noundef false) #[[ATTR5]]
; TUNIT-NEXT: [[TMP0:%.*]] = load <8 x i64>, ptr [[TMP]], align 64
-; TUNIT-NEXT: call fastcc void @callee_avx2_legal256_prefer256_call_avx2_legal512_prefer256(ptr noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]]) #[[ATTR6]]
-; TUNIT-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr [[TMP2]], align 64
-; TUNIT-NEXT: store <8 x i64> [[TMP4]], ptr [[ARG]], align 2
+; TUNIT-NEXT: call fastcc void @callee_avx2_legal256_prefer256_call_avx2_legal512_prefer256(ptr noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TRUETMP2]], <8 x i64> [[TMP0]]) #[[ATTR6]]
+; TUNIT-NEXT: [[TRUETMP4:%.*]] = load <8 x i64>, ptr [[TRUETMP2]], align 64
+; TUNIT-NEXT: store <8 x i64> [[TRUETMP4]], ptr [[ARG]], align 2
; TUNIT-NEXT: ret void
;
; CGSCC: Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable
@@ -379,12 +379,12 @@ define void @avx2_legal256_prefer256_call_avx2_legal512_prefer256(ptr %arg) #4 {
; CGSCC-SAME: (ptr nocapture nofree noundef nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) #[[ATTR3]] {
; CGSCC-NEXT: bb:
; CGSCC-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
-; CGSCC-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
+; CGSCC-NEXT: [[TRUETMP2:%.*]] = alloca <8 x i64>, align 32
; CGSCC-NEXT: call void @llvm.memset.p0.i64(ptr noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP]], i8 noundef 0, i64 noundef 32, i1 noundef false) #[[ATTR5]]
; CGSCC-NEXT: [[TMP0:%.*]] = load <8 x i64>, ptr [[TMP]], align 64
-; CGSCC-NEXT: call fastcc void @callee_avx2_legal256_prefer256_call_avx2_legal512_prefer256(ptr noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]]) #[[ATTR6]]
-; CGSCC-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr [[TMP2]], align 64
-; CGSCC-NEXT: store <8 x i64> [[TMP4]], ptr [[ARG]], align 2
+; CGSCC-NEXT: call fastcc void @callee_avx2_legal256_prefer256_call_avx2_legal512_prefer256(ptr noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TRUETMP2]], <8 x i64> [[TMP0]]) #[[ATTR6]]
+; CGSCC-NEXT: [[TRUETMP4:%.*]] = load <8 x i64>, ptr [[TRUETMP2]], align 64
+; CGSCC-NEXT: store <8 x i64> [[TRUETMP4]], ptr [[ARG]], align 2
; CGSCC-NEXT: ret void
;
bb:
@@ -423,12 +423,12 @@ define void @avx2_legal512_prefer256_call_avx2_legal256_prefer256(ptr %arg) #3 {
; TUNIT-SAME: (ptr nocapture nofree writeonly [[ARG:%.*]]) #[[ATTR3]] {
; TUNIT-NEXT: bb:
; TUNIT-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
-; TUNIT-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
+; TUNIT-NEXT: [[TRUETMP2:%.*]] = alloca <8 x i64>, align 32
; TUNIT-NEXT: call void @llvm.memset.p0.i64(ptr noalias nocapture nofree noundef nonnull writeonly align 32 dereferenceable(64) [[TMP]], i8 noundef 0, i64 noundef 32, i1 noundef false) #[[ATTR5]]
; TUNIT-NEXT: [[TMP0:%.*]] = load <8 x i64>, ptr [[TMP]], align 64
-; TUNIT-NEXT: call fastcc void @callee_avx2_legal512_prefer256_call_avx2_legal256_prefer256(ptr noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]]) #[[ATTR6]]
-; TUNIT-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr [[TMP2]], align 64
-; TUNIT-NEXT: store <8 x i64> [[TMP4]], ptr [[ARG]], align 2
+; TUNIT-NEXT: call fastcc void @callee_avx2_legal512_prefer256_call_avx2_legal256_prefer256(ptr noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TRUETMP2]], <8 x i64> [[TMP0]]) #[[ATTR6]]
+; TUNIT-NEXT: [[TRUETMP4:%.*]] = load <8 x i64>, ptr [[TRUETMP2]], align 64
+; TUNIT-NEXT: store <8 x i64> [[TRUETMP4]], ptr [[ARG]], align 2
; TUNIT-NEXT: ret void
;
; CGSCC: Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable
@@ -436,12 +436,12 @@ define void @avx2_legal512_prefer256_call_avx2_legal256_prefer256(ptr %arg) #3 {
; CGSCC-SAME: (ptr nocapture nofree noundef nonnull writeonly align 2 dereferenceable(64) [[ARG:%.*]]) #[[ATTR3]] {
; CGSCC-NEXT: bb:
; CGSCC-NEXT: [[TMP:%.*]] = alloca <8 x i64>, align 32
-; CGSCC-NEXT: [[TMP2:%.*]] = alloca <8 x i64>, align 32
+; CGSCC-NEXT: [[TRUETMP2:%.*]] = alloca <8 x i64>, align 32
; CGSCC-NEXT: call void @llvm.memset.p0.i64(ptr noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP]], i8 noundef 0, i64 noundef 32, i1 noundef false) #[[ATTR5]]
; CGSCC-NEXT: [[TMP0:%.*]] = load <8 x i64>, ptr [[TMP]], align 64
-; CGSCC-NEXT: call fastcc void @callee_avx2_legal512_prefer256_call_avx2_legal256_prefer256(ptr noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TMP2]], <8 x i64> [[TMP0]]) #[[ATTR6]]
-; CGSCC-NEXT: [[TMP4:%.*]] = load <8 x i64>, ptr [[TMP2]], align 64
-; CGSCC-NEXT: store <8 x i64> [[TMP4]], ptr [[ARG]], align 2
+; CGSCC-NEXT: call fastcc void @callee_avx2_legal512_prefer256_call_avx2_legal256_prefer256(ptr noalias nocapture nofree noundef nonnull writeonly align 64 dereferenceable(64) [[TRUETMP2]], <8 x i64> [[TMP0]]) #[[ATTR6]]
+; CGSCC-NEXT: [[TRUETMP4:%.*]] = load <8 x i64>, ptr [[TRUETMP2]], align 64
+; CGSCC-NEXT: store <8 x i64> [[TRUETMP4]], ptr [[ARG]], align 2
; CGSCC-NEXT: ret void
;
bb:
diff --git a/llvm/test/Transforms/Attributor/ArgumentPromotion/attrs.ll b/llvm/test/Transforms/Attributor/ArgumentPromotion/attrs.ll
index 38953c1fde5b76..e86832331c69bc 100644
--- a/llvm/test/Transforms/Attributor/ArgumentPromotion/attrs.ll
+++ b/llvm/test/Transforms/Attributor/ArgumentPromotion/attrs.ll
@@ -17,12 +17,12 @@ define internal i32 @f(ptr byval(%struct.ss) %b, ptr byval(i32) %X, i32 %i) noun
; CHECK-NEXT: store i32 [[TMP0]], ptr [[B_PRIV]], align 4
; CHECK-NEXT: [[B_PRIV_0_1:%.*]] = getelementptr [[STRUCT_SS]], ptr [[B_PRIV]], i64 0, i32 1
; CHECK-NEXT: store i64 [[TMP1]], ptr [[B_PRIV_0_1]], align 4
-; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[B_PRIV]], align 8
-; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], 1
-; CHECK-NEXT: store i32 [[TMP2]], ptr [[B_PRIV]], align 8
+; CHECK-NEXT: [[TRUETMP1:%.*]] = load i32, ptr [[B_PRIV]], align 8
+; CHECK-NEXT: [[TRUETMP2:%.*]] = add i32 [[TRUETMP1]], 1
+; CHECK-NEXT: store i32 [[TRUETMP2]], ptr [[B_PRIV]], align 8
; CHECK-NEXT: store i32 0, ptr [[X_PRIV]], align 4
; CHECK-NEXT: [[L:%.*]] = load i32, ptr [[X_PRIV]], align 4
-; CHECK-NEXT: [[A:%.*]] = add i32 [[L]], [[TMP2]]
+; CHECK-NEXT: [[A:%.*]] = add i32 [[L]], [[TRUETMP2]]
; CHECK-NEXT: ret i32 [[A]]
;
entry:
@@ -46,7 +46,7 @@ define i32 @test(ptr %X) {
; TUNIT-NEXT: entry:
; TUNIT-NEXT: [[S:%.*]] = alloca [[STRUCT_SS:%.*]], align 8
; TUNIT-NEXT: store i32 1, ptr [[S]], align 8
-; TUNIT-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], ptr [[S]], i32 0, i32 1
+; TUNIT-NEXT: [[TRUETMP4:%.*]] = getelementptr [[STRUCT_SS]], ptr [[S]], i32 0, i32 1
; TUNIT-NEXT: [[TMP0:%.*]] = load i32, ptr [[S]], align 8
; TUNIT-NEXT: [[S_0_1:%.*]] = getelementptr [[STRUCT_SS]], ptr [[S]], i64 0, i32 1
; TUNIT-NEXT: [[TMP1:%.*]] = load i64, ptr [[S_0_1]], align 8
@@ -59,7 +59,7 @@ define i32 @test(ptr %X) {
; CGSCC-SAME: (ptr nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR1:[0-9]+]] {
; CGSCC-NEXT: entry:
; CGSCC-NEXT: [[S:%.*]] = alloca [[STRUCT_SS:%.*]], align 8
-; CGSCC-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], ptr [[S]], i32 0, i32 1
+; CGSCC-NEXT: [[TRUETMP4:%.*]] = getelementptr [[STRUCT_SS]], ptr [[S]], i32 0, i32 1
; CGSCC-NEXT: [[TMP0:%.*]] = load i32, ptr [[X]], align 4
; CGSCC-NEXT: [[C:%.*]] = call i32 @f(i32 noundef 1, i64 noundef 2, i32 [[TMP0]]) #[[ATTR2:[0-9]+]]
; CGSCC-NEXT: ret i32 [[C]]
diff --git a/llvm/test/Transforms/Attributor/ArgumentPromotion/byval-2.ll b/llvm/test/Transforms/Attributor/ArgumentPromotion/byval-2.ll
index 96e41fd8535b2a..d3c29782e0e462 100644
--- a/llvm/test/Transforms/Attributor/ArgumentPromotion/byval-2.ll
+++ b/llvm/test/Transforms/Attributor/ArgumentPromotion/byval-2.ll
@@ -15,9 +15,9 @@ define internal void @f(ptr byval(%struct.ss) %b, ptr byval(i32) %X) nounwind
; CHECK-NEXT: store i32 [[TMP0]], ptr [[B_PRIV]], align 4
; CHECK-NEXT: [[B_PRIV_0_1:%.*]] = getelementptr [[STRUCT_SS]], ptr [[B_PRIV]], i64 0, i32 1
; CHECK-NEXT: store i64 [[TMP1]], ptr [[B_PRIV_0_1]], align 4
-; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[B_PRIV]], align 8
-; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], 1
-; CHECK-NEXT: store i32 [[TMP2]], ptr [[B_PRIV]], align 8
+; CHECK-NEXT: [[TRUETMP1:%.*]] = load i32, ptr [[B_PRIV]], align 8
+; CHECK-NEXT: [[TRUETMP2:%.*]] = add i32 [[TRUETMP1]], 1
+; CHECK-NEXT: store i32 [[TRUETMP2]], ptr [[B_PRIV]], align 8
; CHECK-NEXT: store i32 0, ptr [[X_PRIV]], align 4
; CHECK-NEXT: ret void
;
@@ -38,7 +38,7 @@ define i32 @test(ptr %X) {
; TUNIT-NEXT: entry:
; TUNIT-NEXT: [[S:%.*]] = alloca [[STRUCT_SS:%.*]], align 8
; TUNIT-NEXT: store i32 1, ptr [[S]], align 8
-; TUNIT-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], ptr [[S]], i32 0, i32 1
+; TUNIT-NEXT: [[TRUETMP4:%.*]] = getelementptr [[STRUCT_SS]], ptr [[S]], i32 0, i32 1
; TUNIT-NEXT: [[TMP0:%.*]] = load i32, ptr [[S]], align 8
; TUNIT-NEXT: [[S_0_1:%.*]] = getelementptr [[STRUCT_SS]], ptr [[S]], i64 0, i32 1
; TUNIT-NEXT: [[TMP1:%.*]] = load i64, ptr [[S_0_1]], align 8
@@ -51,7 +51,7 @@ define i32 @test(ptr %X) {
; CGSCC-SAME: (ptr nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR1:[0-9]+]] {
; CGSCC-NEXT: entry:
; CGSCC-NEXT: [[S:%.*]] = alloca [[STRUCT_SS:%.*]], align 8
-; CGSCC-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], ptr [[S]], i32 0, i32 1
+; CGSCC-NEXT: [[TRUETMP4:%.*]] = getelementptr [[STRUCT_SS]], ptr [[S]], i32 0, i32 1
; CGSCC-NEXT: [[TMP0:%.*]] = load i32, ptr [[X]], align 4
; CGSCC-NEXT: call void @f(i32 noundef 1, i64 noundef 2, i32 [[TMP0]]) #[[ATTR2:[0-9]+]]
; CGSCC-NEXT: ret i32 0
diff --git a/llvm/test/Transforms/Attributor/ArgumentPromotion/byval.ll b/llvm/test/Transforms/Attributor/ArgumentPromotion/byval.ll
index ce29fbe32beb2f..90a6ecf730963d 100644
--- a/llvm/test/Transforms/Attributor/ArgumentPromotion/byval.ll
+++ b/llvm/test/Transforms/Attributor/ArgumentPromotion/byval.ll
@@ -15,10 +15,10 @@ define internal i32 @f(ptr byval(%struct.ss) %b) nounwind {
; CHECK-NEXT: store i32 [[TMP0]], ptr [[B_PRIV]], align 4
; CHECK-NEXT: [[B_PRIV_0_1:%.*]] = getelementptr [[STRUCT_SS]], ptr [[B_PRIV]], i64 0, i32 1
; CHECK-NEXT: store i64 [[TMP1]], ptr [[B_PRIV_0_1]], align 4
-; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[B_PRIV]], align 8
-; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], 1
-; CHECK-NEXT: store i32 [[TMP2]], ptr [[B_PRIV]], align 8
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[TRUETMP1:%.*]] = load i32, ptr [[B_PRIV]], align 8
+; CHECK-NEXT: [[TRUETMP2:%.*]] = add i32 [[TRUETMP1]], 1
+; CHECK-NEXT: store i32 [[TRUETMP2]], ptr [[B_PRIV]], align 8
+; CHECK-NEXT: ret i32 [[TRUETMP1]]
;
entry:
%tmp1 = load i32, ptr %b, align 4
@@ -37,10 +37,10 @@ define internal i32 @g(ptr byval(%struct.ss) align 32 %b) nounwind {
; CHECK-NEXT: store i32 [[TMP0]], ptr [[B_PRIV]], align 4
; CHECK-NEXT: [[B_PRIV_0_1:%.*]] = getelementptr [[STRUCT_SS]], ptr [[B_PRIV]], i64 0, i32 1
; CHECK-NEXT: store i64 [[TMP1]], ptr [[B_PRIV_0_1]], align 4
-; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[B_PRIV]], align 32
-; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], 1
-; CHECK-NEXT: store i32 [[TMP2]], ptr [[B_PRIV]], align 32
-; CHECK-NEXT: ret i32 [[TMP2]]
+; CHECK-NEXT: [[TRUETMP1:%.*]] = load i32, ptr [[B_PRIV]], align 32
+; CHECK-NEXT: [[TRUETMP2:%.*]] = add i32 [[TRUETMP1]], 1
+; CHECK-NEXT: store i32 [[TRUETMP2]], ptr [[B_PRIV]], align 32
+; CHECK-NEXT: ret i32 [[TRUETMP2]]
;
entry:
%tmp1 = load i32, ptr %b, align 4
@@ -57,7 +57,7 @@ define i32 @main() nounwind {
; TUNIT-NEXT: entry:
; TUNIT-NEXT: [[S:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
; TUNIT-NEXT: store i32 1, ptr [[S]], align 32
-; TUNIT-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], ptr [[S]], i32 0, i32 1
+; TUNIT-NEXT: [[TRUETMP4:%.*]] = getelementptr [[STRUCT_SS]], ptr [[S]], i32 0, i32 1
; TUNIT-NEXT: [[TMP0:%.*]] = load i32, ptr [[S]], align 8
; TUNIT-NEXT: [[S_0_11:%.*]] = getelementptr [[STRUCT_SS]], ptr [[S]], i64 0, i32 1
; TUNIT-NEXT: [[TMP1:%.*]] = load i64, ptr [[S_0_11]], align 8
@@ -74,7 +74,7 @@ define i32 @main() nounwind {
; CGSCC-SAME: () #[[ATTR1:[0-9]+]] {
; CGSCC-NEXT: entry:
; CGSCC-NEXT: [[S:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
-; CGSCC-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_SS]], ptr [[S]], i32 0, i32 1
+; CGSCC-NEXT: [[TRUETMP4:%.*]] = getelementptr [[STRUCT_SS]], ptr [[S]], i32 0, i32 1
; CGSCC-NEXT: [[C0:%.*]] = call i32 @f(i32 noundef 1, i64 noundef 2) #[[ATTR2:[0-9]+]]
; CGSCC-NEXT: [[C1:%.*]] = call i32 @g(i32 noundef 1, i64 noundef 2) #[[ATTR2]]
; CGSCC-NEXT: [[A:%.*]] = add i32 [[C0]], [[C1]]
diff --git a/llvm/test/Transforms/Attributor/ArgumentPromotion/crash.ll b/llvm/test/Transforms/Attributor/ArgumentPromotion/crash.ll
index 3acb1b72803d75..a42aedd1da0d5e 100644
--- a/llvm/test/Transforms/Attributor/ArgumentPromotion/crash.ll
+++ b/llvm/test/Transforms/Attributor/ArgumentPromotion/crash.ll
@@ -107,7 +107,7 @@ define i32 @test_inf_promote_caller(i32 %arg) {
; CGSCC-SAME: (i32 [[ARG:%.*]]) #[[ATTR3:[0-9]+]] {
; CGSCC-NEXT: bb:
; CGSCC-NEXT: [[TMP:%.*]] = alloca [[S:%.*]], align 8
-; CGSCC-NEXT: [[TMP1:%.*]] = alloca [[S]], align 8
+; CGSCC-NEXT: [[TRUETMP1:%.*]] = alloca [[S]], align 8
; CGSCC-NEXT: ret i32 0
;
bb:
diff --git a/llvm/test/Transforms/Attributor/IPConstantProp/2009-09-24-byval-ptr.ll b/llvm/test/Transforms/Attributor/IPConstantProp/2009-09-24-byval-ptr.ll
index 0e0352e5039b30..8da93974a50adf 100644
--- a/llvm/test/Transforms/Attributor/IPConstantProp/2009-09-24-byval-ptr.ll
+++ b/llvm/test/Transforms/Attributor/IPConstantProp/2009-09-24-byval-ptr.ll
@@ -139,12 +139,12 @@ define i32 @unions_v2() nounwind {
; TUNIT-SAME: () #[[ATTR0]] {
; TUNIT-NEXT: entry:
; TUNIT-NEXT: [[TMP0:%.*]] = load i8, ptr @mystr, align 8
-; TUNIT-NEXT: [[MYSTR_0_11:%.*]] = getelementptr [[STRUCT_MYSTR:%.*]], ptr @mystr, i64 0, i32 1
-; TUNIT-NEXT: [[TMP1:%.*]] = load i32, ptr [[MYSTR_0_11]], align 8
+; TUNIT-NEXT: [[MYSTR_0_1:%.*]] = getelementptr [[STRUCT_MYSTR:%.*]], ptr @mystr, i64 0, i32 1
+; TUNIT-NEXT: [[TMP1:%.*]] = load i32, ptr [[MYSTR_0_1]], align 8
; TUNIT-NEXT: call void @vfu1(i8 [[TMP0]], i32 [[TMP1]]) #[[ATTR0]]
; TUNIT-NEXT: [[TMP2:%.*]] = load i8, ptr @mystr, align 8
-; TUNIT-NEXT: [[MYSTR_0_1:%.*]] = getelementptr [[STRUCT_MYSTR]], ptr @mystr, i64 0, i32 1
-; TUNIT-NEXT: [[TMP3:%.*]] = load i32, ptr [[MYSTR_0_1]], align 8
+; TUNIT-NEXT: [[MYSTR_0_11:%.*]] = getelementptr [[STRUCT_MYSTR]], ptr @mystr, i64 0, i32 1
+; TUNIT-NEXT: [[TMP3:%.*]] = load i32, ptr [[MYSTR_0_11]], align 8
; TUNIT-NEXT: [[RESULT:%.*]] = call i32 @vfu2_v2(i8 [[TMP2]], i32 [[TMP3]]) #[[ATTR2]]
; TUNIT-NEXT: ret i32 [[RESULT]]
;
diff --git a/llvm/test/Transforms/Attributor/IPConstantProp/PR43857.ll b/llvm/test/Transforms/Attributor/IPConstantProp/PR43857.ll
index 160cd7357181d1..df79cc01b0af5a 100644
--- a/llvm/test/Transforms/Attributor/IPConstantProp/PR43857.ll
+++ b/llvm/test/Transforms/Attributor/IPConstantProp/PR43857.ll
@@ -23,7 +23,7 @@ define void @baz(<8 x i32> %arg) local_unnamed_addr {
; TUNIT-LABEL: define {{[^@]+}}@baz
; TUNIT-SAME: (<8 x i32> [[ARG:%.*]]) local_unnamed_addr #[[ATTR0]] {
; TUNIT-NEXT: bb:
-; TUNIT-NEXT: [[TMP1:%.*]] = extractvalue [[STRUCT_ZOT:%.*]] undef, 0, 0
+; TUNIT-NEXT: [[TRUETMP1:%.*]] = extractvalue [[STRUCT_ZOT:%.*]] undef, 0, 0
; TUNIT-NEXT: ret void
;
; CGSCC: Function Attrs: mustprogress nofree nosync nounwind willreturn memory(none)
diff --git a/llvm/test/Transforms/Attributor/IPConstantProp/openmp_parallel_for.ll b/llvm/test/Transforms/Attributor/IPConstantProp/openmp_parallel_for.ll
index 2737f5fcb81067..932dcb5f2a91ef 100644
--- a/llvm/test/Transforms/Attributor/IPConstantProp/openmp_parallel_for.ll
+++ b/llvm/test/Transforms/Attributor/IPConstantProp/openmp_parallel_for.ll
@@ -76,32 +76,32 @@ define internal void @.omp_outlined.(ptr noalias %.global_tid., ptr noalias %.bo
; TUNIT-NEXT: store i32 4, ptr [[DOTOMP_UB]], align 4
; TUNIT-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
; TUNIT-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
-; TUNIT-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTGLOBAL_TID_]], align 4
-; TUNIT-NEXT: call void @__kmpc_for_static_init_4(ptr noundef nonnull align 8 dereferenceable(24) @[[GLOB0]], i32 [[TMP5]], i32 noundef 34, ptr noundef nonnull align 4 dereferenceable(4) [[DOTOMP_IS_LAST]], ptr noundef nonnull align 4 dereferenceable(4) [[DOTOMP_LB]], ptr noundef nonnull align 4 dereferenceable(4) [[DOTOMP_UB]], ptr noundef nonnull align 4 dereferenceable(4) [[DOTOMP_STRIDE]], i32 noundef 1, i32 noundef 1)
-; TUNIT-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-; TUNIT-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP6]], 4
+; TUNIT-NEXT: [[TRUETMP5:%.*]] = load i32, ptr [[DOTGLOBAL_TID_]], align 4
+; TUNIT-NEXT: call void @__kmpc_for_static_init_4(ptr noundef nonnull align 8 dereferenceable(24) @[[GLOB0]], i32 [[TRUETMP5]], i32 noundef 34, ptr noundef nonnull align 4 dereferenceable(4) [[DOTOMP_IS_LAST]], ptr noundef nonnull align 4 dereferenceable(4) [[DOTOMP_LB]], ptr noundef nonnull align 4 dereferenceable(4) [[DOTOMP_UB]], ptr noundef nonnull align 4 dereferenceable(4) [[DOTOMP_STRIDE]], i32 noundef 1, i32 noundef 1)
+; TUNIT-NEXT: [[TRUETMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+; TUNIT-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TRUETMP6]], 4
; TUNIT-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
; TUNIT: cond.true:
; TUNIT-NEXT: br label [[COND_END:%.*]]
; TUNIT: cond.false:
-; TUNIT-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+; TUNIT-NEXT: [[TRUETMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
; TUNIT-NEXT: br label [[COND_END]]
; TUNIT: cond.end:
-; TUNIT-NEXT: [[COND:%.*]] = phi i32 [ 4, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
+; TUNIT-NEXT: [[COND:%.*]] = phi i32 [ 4, [[COND_TRUE]] ], [ [[TRUETMP7]], [[COND_FALSE]] ]
; TUNIT-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
-; TUNIT-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
+; TUNIT-NEXT: [[TRUETMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
; TUNIT-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
; TUNIT: omp.inner.for.cond:
-; TUNIT-NEXT: [[DOTOMP_IV_0:%.*]] = phi i32 [ [[TMP8]], [[COND_END]] ], [ [[ADD11:%.*]], [[OMP_INNER_FOR_INC:%.*]] ]
-; TUNIT-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-; TUNIT-NEXT: [[CMP8:%.*]] = icmp sgt i32 [[DOTOMP_IV_0]], [[TMP9]]
+; TUNIT-NEXT: [[DOTOMP_IV_0:%.*]] = phi i32 [ [[TRUETMP8]], [[COND_END]] ], [ [[ADD11:%.*]], [[OMP_INNER_FOR_INC:%.*]] ]
+; TUNIT-NEXT: [[TRUETMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+; TUNIT-NEXT: [[CMP8:%.*]] = icmp sgt i32 [[DOTOMP_IV_0]], [[TRUETMP9]]
; TUNIT-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]], label [[OMP_INNER_FOR_BODY:%.*]]
; TUNIT: omp.inner.for.cond.cleanup:
; TUNIT-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
; TUNIT: omp.inner.for.body:
; TUNIT-NEXT: [[ADD10:%.*]] = add nsw i32 [[DOTOMP_IV_0]], 2
-; TUNIT-NEXT: [[TMP11:%.*]] = load double, ptr [[Q_ADDR]], align 8
-; TUNIT-NEXT: call void @bar(i32 [[ADD10]], float nofpclass(nan inf zero sub nnorm) 3.000000e+00, double [[TMP11]])
+; TUNIT-NEXT: [[TRUETMP11:%.*]] = load double, ptr [[Q_ADDR]], align 8
+; TUNIT-NEXT: call void @bar(i32 [[ADD10]], float nofpclass(nan inf zero sub nnorm) 3.000000e+00, double [[TRUETMP11]])
; TUNIT-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
; TUNIT: omp.body.continue:
; TUNIT-NEXT: br label [[OMP_INNER_FOR_INC]]
@@ -111,8 +111,8 @@ define internal void @.omp_outlined.(ptr noalias %.global_tid., ptr noalias %.bo
; TUNIT: omp.inner.for.end:
; TUNIT-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
; TUNIT: omp.loop.exit:
-; TUNIT-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTGLOBAL_TID_]], align 4
-; TUNIT-NEXT: call void @__kmpc_for_static_fini(ptr noundef nonnull align 8 dereferenceable(24) @[[GLOB0]], i32 [[TMP12]])
+; TUNIT-NEXT: [[TRUETMP12:%.*]] = load i32, ptr [[DOTGLOBAL_TID_]], align 4
+; TUNIT-NEXT: call void @__kmpc_for_static_fini(ptr noundef nonnull align 8 dereferenceable(24) @[[GLOB0]], i32 [[TRUETMP12]])
; TUNIT-NEXT: br label [[OMP_PRECOND_END:%.*]]
; TUNIT: omp.precond.end:
; TUNIT-NEXT: ret void
@@ -135,33 +135,33 @@ define internal void @.omp_outlined.(ptr noalias %.global_tid., ptr noalias %.bo
; CGSCC-NEXT: store i32 [[SUB3]], ptr [[DOTOMP_UB]], align 4
; CGSCC-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
; CGSCC-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
-; CGSCC-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTGLOBAL_TID_]], align 4
-; CGSCC-NEXT: call void @__kmpc_for_static_init_4(ptr noundef nonnull align 8 dereferenceable(24) @[[GLOB0]], i32 [[TMP5]], i32 noundef 34, ptr noundef nonnull align 4 dereferenceable(4) [[DOTOMP_IS_LAST]], ptr noundef nonnull align 4 dereferenceable(4) [[DOTOMP_LB]], ptr noundef nonnull align 4 dereferenceable(4) [[DOTOMP_UB]], ptr noundef nonnull align 4 dereferenceable(4) [[DOTOMP_STRIDE]], i32 noundef 1, i32 noundef 1)
-; CGSCC-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-; CGSCC-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP6]], [[SUB3]]
+; CGSCC-NEXT: [[TRUETMP5:%.*]] = load i32, ptr [[DOTGLOBAL_TID_]], align 4
+; CGSCC-NEXT: call void @__kmpc_for_static_init_4(ptr noundef nonnull align 8 dereferenceable(24) @[[GLOB0]], i32 [[TRUETMP5]], i32 noundef 34, ptr noundef nonnull align 4 dereferenceable(4) [[DOTOMP_IS_LAST]], ptr noundef nonnull align 4 dereferenceable(4) [[DOTOMP_LB]], ptr noundef nonnull align 4 dereferenceable(4) [[DOTOMP_UB]], ptr noundef nonnull align 4 dereferenceable(4) [[DOTOMP_STRIDE]], i32 noundef 1, i32 noundef 1)
+; CGSCC-NEXT: [[TRUETMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+; CGSCC-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TRUETMP6]], [[SUB3]]
; CGSCC-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
; CGSCC: cond.true:
; CGSCC-NEXT: br label [[COND_END:%.*]]
; CGSCC: cond.false:
-; CGSCC-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+; CGSCC-NEXT: [[TRUETMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
; CGSCC-NEXT: br label [[COND_END]]
; CGSCC: cond.end:
-; CGSCC-NEXT: [[COND:%.*]] = phi i32 [ [[SUB3]], [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
+; CGSCC-NEXT: [[COND:%.*]] = phi i32 [ [[SUB3]], [[COND_TRUE]] ], [ [[TRUETMP7]], [[COND_FALSE]] ]
; CGSCC-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
-; CGSCC-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
+; CGSCC-NEXT: [[TRUETMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
; CGSCC-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
; CGSCC: omp.inner.for.cond:
-; CGSCC-NEXT: [[DOTOMP_IV_0:%.*]] = phi i32 [ [[TMP8]], [[COND_END]] ], [ [[ADD11:%.*]], [[OMP_INNER_FOR_INC:%.*]] ]
-; CGSCC-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
-; CGSCC-NEXT: [[CMP8:%.*]] = icmp sgt i32 [[DOTOMP_IV_0]], [[TMP9]]
+; CGSCC-NEXT: [[DOTOMP_IV_0:%.*]] = phi i32 [ [[TRUETMP8]], [[COND_END]] ], [ [[ADD11:%.*]], [[OMP_INNER_FOR_INC:%.*]] ]
+; CGSCC-NEXT: [[TRUETMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
+; CGSCC-NEXT: [[CMP8:%.*]] = icmp sgt i32 [[DOTOMP_IV_0]], [[TRUETMP9]]
; CGSCC-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]], label [[OMP_INNER_FOR_BODY:%.*]]
; CGSCC: omp.inner.for.cond.cleanup:
; CGSCC-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
; CGSCC: omp.inner.for.body:
; CGSCC-NEXT: [[ADD10:%.*]] = add nsw i32 [[DOTOMP_IV_0]], 2
-; CGSCC-NEXT: [[TMP10:%.*]] = load float, ptr [[P]], align 4
-; CGSCC-NEXT: [[TMP11:%.*]] = load double, ptr [[Q_ADDR]], align 8
-; CGSCC-NEXT: call void @bar(i32 [[ADD10]], float [[TMP10]], double [[TMP11]])
+; CGSCC-NEXT: [[TRUETMP10:%.*]] = load float, ptr [[P]], align 4
+; CGSCC-NEXT: [[TRUETMP11:%.*]] = load double, ptr [[Q_ADDR]], align 8
+; CGSCC-NEXT: call void @bar(i32 [[ADD10]], float [[TRUETMP10]], double [[TRUETMP11]])
; CGSCC-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
; CGSCC: omp.body.continue:
; CGSCC-NEXT: br label [[OMP_INNER_FOR_INC]]
@@ -171,8 +171,8 @@ define internal void @.omp_outlined.(ptr noalias %.global_tid., ptr noalias %.bo
; CGSCC: omp.inner.for.end:
; CGSCC-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
; CGSCC: omp.loop.exit:
-; CGSCC-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTGLOBAL_TID_]], align 4
-; CGSCC-NEXT: call void @__kmpc_for_static_fini(ptr noundef nonnull align 8 dereferenceable(24) @[[GLOB0]], i32 [[TMP12]])
+; CGSCC-NEXT: [[TRUETMP12:%.*]] = load i32, ptr [[DOTGLOBAL_TID_]], align 4
+; CGSCC-NEXT: call void @__kmpc_for_static_fini(ptr noundef nonnull align 8 dereferenceable(24) @[[GLOB0]], i32 [[TRUETMP12]])
; CGSCC-NEXT: br label [[OMP_PRECOND_END]]
; CGSCC: omp.precond.end:
; CGSCC-NEXT: ret void
diff --git a/llvm/test/Transforms/Attributor/IPConstantProp/thread_local_acs.ll b/llvm/test/Transforms/Attributor/IPConstantProp/thread_local_acs.ll
index 0ced518583384e..ac9d1b63d34357 100644
--- a/llvm/test/Transforms/Attributor/IPConstantProp/thread_local_acs.ll
+++ b/llvm/test/Transforms/Attributor/IPConstantProp/thread_local_acs.ll
@@ -31,8 +31,8 @@ define internal i32 @callee(ptr %thread_local_ptr, ptr %shared_ptr) {
; CHECK-SAME: (ptr nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[THREAD_LOCAL_PTR:%.*]], ptr nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[SHARED_PTR:%.*]]) #[[ATTR0:[0-9]+]] {
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP:%.*]] = load i32, ptr @gtl, align 4
-; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @gsh, align 4
-; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP]], [[TMP1]]
+; CHECK-NEXT: [[TRUETMP1:%.*]] = load i32, ptr @gsh, align 4
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP]], [[TRUETMP1]]
; CHECK-NEXT: ret i32 [[ADD]]
;
entry:
diff --git a/llvm/test/Transforms/Attributor/address_space_info.ll b/llvm/test/Transforms/Attributor/address_space_info.ll
index 1b4e80f567a4a6..076060a2763c2a 100644
--- a/llvm/test/Transforms/Attributor/address_space_info.ll
+++ b/llvm/test/Transforms/Attributor/address_space_info.ll
@@ -8,11 +8,11 @@
@s2 = dso_local addrspace(3) global i32 undef, align 4
;.
-; CHECK: @dst = dso_local addrspace(1) externally_initialized global i32 0, align 4
-; CHECK: @g1 = dso_local addrspace(1) externally_initialized global ptr null, align 4
-; CHECK: @g2 = dso_local addrspace(1) externally_initialized global i32 0, align 4
-; CHECK: @s1 = dso_local addrspace(3) global i32 undef, align 4
-; CHECK: @s2 = dso_local addrspace(3) global i32 undef, align 4
+; CHECK: @[[DST:[a-zA-Z0-9_$"\\.-]+]] = dso_local addrspace(1) externally_initialized global i32 0, align 4
+; CHECK: @[[G1:[a-zA-Z0-9_$"\\.-]+]] = dso_local addrspace(1) externally_initialized global ptr null, align 4
+; CHECK: @[[G2:[a-zA-Z0-9_$"\\.-]+]] = dso_local addrspace(1) externally_initialized global i32 0, align 4
+; CHECK: @[[S1:[a-zA-Z0-9_$"\\.-]+]] = dso_local addrspace(3) global i32 undef, align 4
+; CHECK: @[[S2:[a-zA-Z0-9_$"\\.-]+]] = dso_local addrspace(3) global i32 undef, align 4
;.
define internal void @_Z12global_writePi(ptr noundef %p) #0 {
; CHECK: Function Attrs: mustprogress nofree noinline norecurse nosync nounwind willreturn memory(write)
diff --git a/llvm/test/Transforms/Attributor/dereferenceable-1.ll b/llvm/test/Transforms/Attributor/dereferenceable-1.ll
index e2f280cb90ef8f..f5dbf313df5488 100644
--- a/llvm/test/Transforms/Attributor/dereferenceable-1.ll
+++ b/llvm/test/Transforms/Attributor/dereferenceable-1.ll
@@ -9,7 +9,7 @@ declare void @deref_phi_user(ptr %a);
; take mininimum of return values
;
;.
-; CHECK: @g = global i64 0
+; CHECK: @[[G:[a-zA-Z0-9_$"\\.-]+]] = global i64 0
;.
define ptr @test1(ptr dereferenceable(4) %0, ptr dereferenceable(8) %1, i1 zeroext %2) local_unnamed_addr {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
diff --git a/llvm/test/Transforms/Attributor/memory_locations.ll b/llvm/test/Transforms/Attributor/memory_locations.ll
index dd76a7bb7ad831..737833eab6b78e 100644
--- a/llvm/test/Transforms/Attributor/memory_locations.ll
+++ b/llvm/test/Transforms/Attributor/memory_locations.ll
@@ -235,16 +235,16 @@ define internal ptr @internal_argmem_only_rec_1(ptr %arg) {
; CHECK: if.then:
; CHECK-NEXT: br label [[RETURN:%.*]]
; CHECK: if.end:
-; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[ARG]], align 4
-; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[TMP1]], 1
+; CHECK-NEXT: [[TRUETMP1:%.*]] = load i32, ptr [[ARG]], align 4
+; CHECK-NEXT: [[CMP1:%.*]] = icmp eq i32 [[TRUETMP1]], 1
; CHECK-NEXT: br i1 [[CMP1]], label [[IF_THEN2:%.*]], label [[IF_END3:%.*]]
; CHECK: if.then2:
; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, ptr [[ARG]], i64 -1
; CHECK-NEXT: [[CALL:%.*]] = call noalias ptr @internal_argmem_only_rec_2(ptr nocapture nofree noundef nonnull align 4 dereferenceable(4) [[ADD_PTR]])
; CHECK-NEXT: br label [[RETURN]]
; CHECK: if.end3:
-; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[ARG]], align 4
-; CHECK-NEXT: [[CONV:%.*]] = sext i32 [[TMP2]] to i64
+; CHECK-NEXT: [[TRUETMP2:%.*]] = load i32, ptr [[ARG]], align 4
+; CHECK-NEXT: [[CONV:%.*]] = sext i32 [[TRUETMP2]] to i64
; CHECK-NEXT: [[CALL4:%.*]] = call noalias ptr @malloc(i64 [[CONV]])
; CHECK-NEXT: br label [[RETURN]]
; CHECK: return:
diff --git a/llvm/test/Transforms/Attributor/nocapture-1.ll b/llvm/test/Transforms/Attributor/nocapture-1.ll
index d08a358b75a3af..1d9aeb9ae1e4b9 100644
--- a/llvm/test/Transforms/Attributor/nocapture-1.ll
+++ b/llvm/test/Transforms/Attributor/nocapture-1.ll
@@ -53,8 +53,8 @@ define i1 @c4(ptr %q, i32 %bitno) {
; CHECK-LABEL: define {{[^@]+}}@c4
; CHECK-SAME: (ptr nofree readnone [[Q:%.*]], i32 [[BITNO:%.*]]) #[[ATTR0]] {
; CHECK-NEXT: [[TMP:%.*]] = ptrtoint ptr [[Q]] to i32
-; CHECK-NEXT: [[TMP2:%.*]] = lshr i32 [[TMP]], [[BITNO]]
-; CHECK-NEXT: [[BIT:%.*]] = trunc i32 [[TMP2]] to i1
+; CHECK-NEXT: [[TRUETMP2:%.*]] = lshr i32 [[TMP]], [[BITNO]]
+; CHECK-NEXT: [[BIT:%.*]] = trunc i32 [[TRUETMP2]] to i1
; CHECK-NEXT: br i1 [[BIT]], label [[L1:%.*]], label [[L0:%.*]]
; CHECK: l0:
; CHECK-NEXT: ret i1 false
@@ -77,8 +77,8 @@ define i1 @c4b(ptr %q, i32 %bitno) {
; CHECK-LABEL: define {{[^@]+}}@c4b
; CHECK-SAME: (ptr nocapture nofree readnone [[Q:%.*]], i32 [[BITNO:%.*]]) #[[ATTR0]] {
; CHECK-NEXT: [[TMP:%.*]] = ptrtoint ptr [[Q]] to i32
-; CHECK-NEXT: [[TMP2:%.*]] = lshr i32 [[TMP]], [[BITNO]]
-; CHECK-NEXT: [[BIT:%.*]] = trunc i32 [[TMP2]] to i1
+; CHECK-NEXT: [[TRUETMP2:%.*]] = lshr i32 [[TMP]], [[BITNO]]
+; CHECK-NEXT: [[BIT:%.*]] = trunc i32 [[TRUETMP2]] to i1
; CHECK-NEXT: br i1 [[BIT]], label [[L1:%.*]], label [[L0:%.*]]
; CHECK: l0:
; CHECK-NEXT: ret i1 false
@@ -102,8 +102,8 @@ define i1 @c5(ptr %q, i32 %bitno) {
; TUNIT-LABEL: define {{[^@]+}}@c5
; TUNIT-SAME: (ptr nofree readonly [[Q:%.*]], i32 [[BITNO:%.*]]) #[[ATTR2:[0-9]+]] {
; TUNIT-NEXT: [[TMP:%.*]] = ptrtoint ptr [[Q]] to i32
-; TUNIT-NEXT: [[TMP2:%.*]] = lshr i32 [[TMP]], [[BITNO]]
-; TUNIT-NEXT: [[BIT:%.*]] = and i32 [[TMP2]], 1
+; TUNIT-NEXT: [[TRUETMP2:%.*]] = lshr i32 [[TMP]], [[BITNO]]
+; TUNIT-NEXT: [[BIT:%.*]] = and i32 [[TRUETMP2]], 1
; TUNIT-NEXT: [[LOOKUP:%.*]] = getelementptr [2 x i1], ptr @lookup_table, i32 0, i32 [[BIT]]
; TUNIT-NEXT: [[VAL:%.*]] = load i1, ptr [[LOOKUP]], align 1
; TUNIT-NEXT: ret i1 [[VAL]]
@@ -112,8 +112,8 @@ define i1 @c5(ptr %q, i32 %bitno) {
; CGSCC-LABEL: define {{[^@]+}}@c5
; CGSCC-SAME: (ptr nofree readonly [[Q:%.*]], i32 [[BITNO:%.*]]) #[[ATTR3:[0-9]+]] {
; CGSCC-NEXT: [[TMP:%.*]] = ptrtoint ptr [[Q]] to i32
-; CGSCC-NEXT: [[TMP2:%.*]] = lshr i32 [[TMP]], [[BITNO]]
-; CGSCC-NEXT: [[BIT:%.*]] = and i32 [[TMP2]], 1
+; CGSCC-NEXT: [[TRUETMP2:%.*]] = lshr i32 [[TMP]], [[BITNO]]
+; CGSCC-NEXT: [[BIT:%.*]] = and i32 [[TRUETMP2]], 1
; CGSCC-NEXT: [[LOOKUP:%.*]] = getelementptr [2 x i1], ptr @lookup_table, i32 0, i32 [[BIT]]
; CGSCC-NEXT: [[VAL:%.*]] = load i1, ptr [[LOOKUP]], align 1
; CGSCC-NEXT: ret i1 [[VAL]]
@@ -171,8 +171,8 @@ define ptr @lookup_bit(ptr %q, i32 %bitno) readnone nounwind {
; CHECK-LABEL: define {{[^@]+}}@lookup_bit
; CHECK-SAME: (ptr nofree readnone [[Q:%.*]], i32 [[BITNO:%.*]]) #[[ATTR0]] {
; CHECK-NEXT: [[TMP:%.*]] = ptrtoint ptr [[Q]] to i32
-; CHECK-NEXT: [[TMP2:%.*]] = lshr i32 [[TMP]], [[BITNO]]
-; CHECK-NEXT: [[BIT:%.*]] = and i32 [[TMP2]], 1
+; CHECK-NEXT: [[TRUETMP2:%.*]] = lshr i32 [[TMP]], [[BITNO]]
+; CHECK-NEXT: [[BIT:%.*]] = and i32 [[TRUETMP2]], 1
; CHECK-NEXT: [[LOOKUP:%.*]] = getelementptr [2 x i1], ptr @lookup_table, i32 0, i32 [[BIT]]
; CHECK-NEXT: ret ptr [[LOOKUP]]
;
@@ -213,8 +213,8 @@ define i32 @nc1(ptr %q, ptr %p, i1 %b) {
; TUNIT: l:
; TUNIT-NEXT: [[X:%.*]] = phi ptr [ [[P]], [[E:%.*]] ]
; TUNIT-NEXT: [[Y:%.*]] = phi ptr [ [[Q]], [[E]] ]
-; TUNIT-NEXT: [[TMP2:%.*]] = select i1 [[B]], ptr [[P]], ptr [[Q]]
-; TUNIT-NEXT: [[VAL:%.*]] = load i32, ptr [[TMP2]], align 4
+; TUNIT-NEXT: [[TRUETMP2:%.*]] = select i1 [[B]], ptr [[P]], ptr [[Q]]
+; TUNIT-NEXT: [[VAL:%.*]] = load i32, ptr [[TRUETMP2]], align 4
; TUNIT-NEXT: store i32 0, ptr [[P]], align 4
; TUNIT-NEXT: store ptr [[Q]], ptr @g, align 8
; TUNIT-NEXT: ret i32 [[VAL]]
@@ -227,8 +227,8 @@ define i32 @nc1(ptr %q, ptr %p, i1 %b) {
; CGSCC: l:
; CGSCC-NEXT: [[X:%.*]] = phi ptr [ [[P]], [[E:%.*]] ]
; CGSCC-NEXT: [[Y:%.*]] = phi ptr [ [[Q]], [[E]] ]
-; CGSCC-NEXT: [[TMP2:%.*]] = select i1 [[B]], ptr [[P]], ptr [[Q]]
-; CGSCC-NEXT: [[VAL:%.*]] = load i32, ptr [[TMP2]], align 4
+; CGSCC-NEXT: [[TRUETMP2:%.*]] = select i1 [[B]], ptr [[P]], ptr [[Q]]
+; CGSCC-NEXT: [[VAL:%.*]] = load i32, ptr [[TRUETMP2]], align 4
; CGSCC-NEXT: store i32 0, ptr [[P]], align 4
; CGSCC-NEXT: store ptr [[Q]], ptr @g, align 8
; CGSCC-NEXT: ret i32 [[VAL]]
@@ -255,8 +255,8 @@ define i32 @nc1_addrspace(ptr %q, ptr addrspace(1) %p, i1 %b) {
; TUNIT-NEXT: [[X:%.*]] = phi ptr addrspace(1) [ [[P]], [[E:%.*]] ]
; TUNIT-NEXT: [[Y:%.*]] = phi ptr [ [[Q]], [[E]] ]
; TUNIT-NEXT: [[TMP:%.*]] = addrspacecast ptr addrspace(1) [[P]] to ptr
-; TUNIT-NEXT: [[TMP2:%.*]] = select i1 [[B]], ptr [[TMP]], ptr [[Q]]
-; TUNIT-NEXT: [[VAL:%.*]] = load i32, ptr [[TMP2]], align 4
+; TUNIT-NEXT: [[TRUETMP2:%.*]] = select i1 [[B]], ptr [[TMP]], ptr [[Q]]
+; TUNIT-NEXT: [[VAL:%.*]] = load i32, ptr [[TRUETMP2]], align 4
; TUNIT-NEXT: store i32 0, ptr addrspace(1) [[P]], align 4
; TUNIT-NEXT: store ptr [[Q]], ptr @g, align 8
; TUNIT-NEXT: ret i32 [[VAL]]
@@ -270,8 +270,8 @@ define i32 @nc1_addrspace(ptr %q, ptr addrspace(1) %p, i1 %b) {
; CGSCC-NEXT: [[X:%.*]] = phi ptr addrspace(1) [ [[P]], [[E:%.*]] ]
; CGSCC-NEXT: [[Y:%.*]] = phi ptr [ [[Q]], [[E]] ]
; CGSCC-NEXT: [[TMP:%.*]] = addrspacecast ptr addrspace(1) [[P]] to ptr
-; CGSCC-NEXT: [[TMP2:%.*]] = select i1 [[B]], ptr [[TMP]], ptr [[Q]]
-; CGSCC-NEXT: [[VAL:%.*]] = load i32, ptr [[TMP2]], align 4
+; CGSCC-NEXT: [[TRUETMP2:%.*]] = select i1 [[B]], ptr [[TMP]], ptr [[Q]]
+; CGSCC-NEXT: [[VAL:%.*]] = load i32, ptr [[TRUETMP2]], align 4
; CGSCC-NEXT: store i32 0, ptr addrspace(1) [[P]], align 4
; CGSCC-NEXT: store ptr [[Q]], ptr @g, align 8
; CGSCC-NEXT: ret i32 [[VAL]]
diff --git a/llvm/test/Transforms/Attributor/nofpclass.ll b/llvm/test/Transforms/Attributor/nofpclass.ll
index 581738fb63a15e..7eec52cd9a2d8a 100644
--- a/llvm/test/Transforms/Attributor/nofpclass.ll
+++ b/llvm/test/Transforms/Attributor/nofpclass.ll
@@ -131,7 +131,7 @@ define float @return_nofpclass_nan_decl_return() {
define float @return_nofpclass_nan_arg(float returned nofpclass(nan) %p) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(nan) float @return_nofpclass_nan_arg
-; CHECK-SAME: (float returned nofpclass(nan) [[P:%.*]]) #[[ATTR2:[0-9]+]] {
+; CHECK-SAME: (float returned nofpclass(nan) [[P:%.*]]) #[[ATTR3:[0-9]+]] {
; CHECK-NEXT: ret float [[P]]
;
ret float %p
@@ -149,7 +149,7 @@ define [2 x [3 x float]] @return_nofpclass_inf_ret_array() {
define float @returned_nnan_fadd(float %arg0, float %arg1) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(nan) float @returned_nnan_fadd
-; CHECK-SAME: (float [[ARG0:%.*]], float [[ARG1:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (float [[ARG0:%.*]], float [[ARG1:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[FADD:%.*]] = fadd nnan float [[ARG0]], [[ARG1]]
; CHECK-NEXT: ret float [[FADD]]
;
@@ -210,7 +210,7 @@ define void @ninf_arg_used_by_callsite_array([2 x [3 x float]] nofpclass(inf) %a
define void @nofpclass_call_use_after_unannotated_use(float %arg) {
; CHECK-LABEL: define void @nofpclass_call_use_after_unannotated_use
; CHECK-SAME: (float [[ARG:%.*]]) {
-; CHECK-NEXT: call void @extern(float [[ARG]]) #[[ATTR12:[0-9]+]]
+; CHECK-NEXT: call void @extern(float [[ARG]]) #[[ATTR13:[0-9]+]]
; CHECK-NEXT: call void @extern(float nofpclass(nan inf) [[ARG]])
; CHECK-NEXT: ret void
;
@@ -222,12 +222,12 @@ define void @nofpclass_call_use_after_unannotated_use(float %arg) {
define float @mutually_recursive0(float %arg) {
; TUNIT: Function Attrs: mustprogress nofree nosync nounwind willreturn memory(none)
; TUNIT-LABEL: define nofpclass(all) float @mutually_recursive0
-; TUNIT-SAME: (float [[ARG:%.*]]) #[[ATTR3:[0-9]+]] {
+; TUNIT-SAME: (float [[ARG:%.*]]) #[[ATTR4:[0-9]+]] {
; TUNIT-NEXT: ret float undef
;
; CGSCC: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CGSCC-LABEL: define nofpclass(all) float @mutually_recursive0
-; CGSCC-SAME: (float [[ARG:%.*]]) #[[ATTR2]] {
+; CGSCC-SAME: (float [[ARG:%.*]]) #[[ATTR3]] {
; CGSCC-NEXT: ret float undef
;
%call = call float @mutually_recursive1(float %arg)
@@ -237,12 +237,12 @@ define float @mutually_recursive0(float %arg) {
define float @mutually_recursive1(float %arg) {
; TUNIT: Function Attrs: mustprogress nofree nosync nounwind willreturn memory(none)
; TUNIT-LABEL: define nofpclass(all) float @mutually_recursive1
-; TUNIT-SAME: (float [[ARG:%.*]]) #[[ATTR3]] {
+; TUNIT-SAME: (float [[ARG:%.*]]) #[[ATTR4]] {
; TUNIT-NEXT: ret float undef
;
; CGSCC: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CGSCC-LABEL: define nofpclass(all) float @mutually_recursive1
-; CGSCC-SAME: (float [[ARG:%.*]]) #[[ATTR2]] {
+; CGSCC-SAME: (float [[ARG:%.*]]) #[[ATTR3]] {
; CGSCC-NEXT: ret float undef
;
%call = call float @mutually_recursive0(float %arg)
@@ -333,7 +333,7 @@ define float @fcmp_ord_assume_callsite_arg_return(float %arg) {
; CHECK-SAME: (float returned nofpclass(nan) [[ARG:%.*]]) {
; CHECK-NEXT: entry:
; CHECK-NEXT: [[IS_NOT_NAN:%.*]] = fcmp ord float [[ARG]], 0.000000e+00
-; CHECK-NEXT: call void @llvm.assume(i1 noundef [[IS_NOT_NAN]]) #[[ATTR13:[0-9]+]]
+; CHECK-NEXT: call void @llvm.assume(i1 noundef [[IS_NOT_NAN]]) #[[ATTR14:[0-9]+]]
; CHECK-NEXT: call void @extern.use(float nofpclass(nan) [[ARG]])
; CHECK-NEXT: ret float [[ARG]]
;
@@ -365,7 +365,7 @@ define void @returned_dead_caller() {
define internal float @only_nofpclass_inf_callers(float %arg) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define internal float @only_nofpclass_inf_callers
-; CHECK-SAME: (float nofpclass(inf) [[ARG:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (float nofpclass(inf) [[ARG:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[ADD:%.*]] = fadd float [[ARG]], [[ARG]]
; CHECK-NEXT: ret float [[ADD]]
;
@@ -376,14 +376,14 @@ define internal float @only_nofpclass_inf_callers(float %arg) {
define float @call_noinf_0(float nofpclass(inf) %arg) {
; TUNIT: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; TUNIT-LABEL: define float @call_noinf_0
-; TUNIT-SAME: (float nofpclass(inf) [[ARG:%.*]]) #[[ATTR2]] {
-; TUNIT-NEXT: [[RESULT:%.*]] = call float @only_nofpclass_inf_callers(float nofpclass(inf) [[ARG]]) #[[ATTR14:[0-9]+]]
+; TUNIT-SAME: (float nofpclass(inf) [[ARG:%.*]]) #[[ATTR3]] {
+; TUNIT-NEXT: [[RESULT:%.*]] = call float @only_nofpclass_inf_callers(float nofpclass(inf) [[ARG]]) #[[ATTR15:[0-9]+]]
; TUNIT-NEXT: ret float [[RESULT]]
;
; CGSCC: Function Attrs: mustprogress nofree nosync nounwind willreturn memory(none)
; CGSCC-LABEL: define float @call_noinf_0
-; CGSCC-SAME: (float nofpclass(inf) [[ARG:%.*]]) #[[ATTR3:[0-9]+]] {
-; CGSCC-NEXT: [[RESULT:%.*]] = call float @only_nofpclass_inf_callers(float nofpclass(inf) [[ARG]]) #[[ATTR13]]
+; CGSCC-SAME: (float nofpclass(inf) [[ARG:%.*]]) #[[ATTR4:[0-9]+]] {
+; CGSCC-NEXT: [[RESULT:%.*]] = call float @only_nofpclass_inf_callers(float nofpclass(inf) [[ARG]]) #[[ATTR14]]
; CGSCC-NEXT: ret float [[RESULT]]
;
%result = call float @only_nofpclass_inf_callers(float %arg)
@@ -393,14 +393,14 @@ define float @call_noinf_0(float nofpclass(inf) %arg) {
define float @call_noinf_1(float %arg) {
; TUNIT: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; TUNIT-LABEL: define float @call_noinf_1
-; TUNIT-SAME: (float [[ARG:%.*]]) #[[ATTR2]] {
-; TUNIT-NEXT: [[RESULT:%.*]] = call float @only_nofpclass_inf_callers(float nofpclass(inf) [[ARG]]) #[[ATTR14]]
+; TUNIT-SAME: (float [[ARG:%.*]]) #[[ATTR3]] {
+; TUNIT-NEXT: [[RESULT:%.*]] = call float @only_nofpclass_inf_callers(float nofpclass(inf) [[ARG]]) #[[ATTR15]]
; TUNIT-NEXT: ret float [[RESULT]]
;
; CGSCC: Function Attrs: mustprogress nofree nosync nounwind willreturn memory(none)
; CGSCC-LABEL: define float @call_noinf_1
-; CGSCC-SAME: (float [[ARG:%.*]]) #[[ATTR3]] {
-; CGSCC-NEXT: [[RESULT:%.*]] = call float @only_nofpclass_inf_callers(float nofpclass(inf) [[ARG]]) #[[ATTR13]]
+; CGSCC-SAME: (float [[ARG:%.*]]) #[[ATTR4]] {
+; CGSCC-NEXT: [[RESULT:%.*]] = call float @only_nofpclass_inf_callers(float nofpclass(inf) [[ARG]]) #[[ATTR14]]
; CGSCC-NEXT: ret float [[RESULT]]
;
%result = call float @only_nofpclass_inf_callers(float nofpclass(inf) %arg)
@@ -411,7 +411,7 @@ define float @call_noinf_1(float %arg) {
define internal float @only_nofpclass_inf_return_users(float %arg) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define internal float @only_nofpclass_inf_return_users
-; CHECK-SAME: (float [[ARG:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (float [[ARG:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[ADD:%.*]] = fadd float [[ARG]], [[ARG]]
; CHECK-NEXT: ret float [[ADD]]
;
@@ -422,14 +422,14 @@ define internal float @only_nofpclass_inf_return_users(float %arg) {
define float @call_noinf_return_0(float %arg) {
; TUNIT: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; TUNIT-LABEL: define nofpclass(inf) float @call_noinf_return_0
-; TUNIT-SAME: (float [[ARG:%.*]]) #[[ATTR2]] {
-; TUNIT-NEXT: [[RESULT:%.*]] = call nofpclass(inf) float @only_nofpclass_inf_return_users(float [[ARG]]) #[[ATTR14]]
+; TUNIT-SAME: (float [[ARG:%.*]]) #[[ATTR3]] {
+; TUNIT-NEXT: [[RESULT:%.*]] = call nofpclass(inf) float @only_nofpclass_inf_return_users(float [[ARG]]) #[[ATTR15]]
; TUNIT-NEXT: ret float [[RESULT]]
;
; CGSCC: Function Attrs: mustprogress nofree nosync nounwind willreturn memory(none)
; CGSCC-LABEL: define nofpclass(inf) float @call_noinf_return_0
-; CGSCC-SAME: (float [[ARG:%.*]]) #[[ATTR3]] {
-; CGSCC-NEXT: [[RESULT:%.*]] = call nofpclass(inf) float @only_nofpclass_inf_return_users(float [[ARG]]) #[[ATTR13]]
+; CGSCC-SAME: (float [[ARG:%.*]]) #[[ATTR4]] {
+; CGSCC-NEXT: [[RESULT:%.*]] = call nofpclass(inf) float @only_nofpclass_inf_return_users(float [[ARG]]) #[[ATTR14]]
; CGSCC-NEXT: ret float [[RESULT]]
;
%result = call nofpclass(inf) float @only_nofpclass_inf_return_users(float %arg)
@@ -439,14 +439,14 @@ define float @call_noinf_return_0(float %arg) {
define float @call_noinf_return_1(float %arg) {
; TUNIT: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; TUNIT-LABEL: define nofpclass(inf) float @call_noinf_return_1
-; TUNIT-SAME: (float [[ARG:%.*]]) #[[ATTR2]] {
-; TUNIT-NEXT: [[RESULT:%.*]] = call nofpclass(inf) float @only_nofpclass_inf_return_users(float [[ARG]]) #[[ATTR14]]
+; TUNIT-SAME: (float [[ARG:%.*]]) #[[ATTR3]] {
+; TUNIT-NEXT: [[RESULT:%.*]] = call nofpclass(inf) float @only_nofpclass_inf_return_users(float [[ARG]]) #[[ATTR15]]
; TUNIT-NEXT: ret float [[RESULT]]
;
; CGSCC: Function Attrs: mustprogress nofree nosync nounwind willreturn memory(none)
; CGSCC-LABEL: define nofpclass(inf) float @call_noinf_return_1
-; CGSCC-SAME: (float [[ARG:%.*]]) #[[ATTR3]] {
-; CGSCC-NEXT: [[RESULT:%.*]] = call nofpclass(inf) float @only_nofpclass_inf_return_users(float [[ARG]]) #[[ATTR13]]
+; CGSCC-SAME: (float [[ARG:%.*]]) #[[ATTR4]] {
+; CGSCC-NEXT: [[RESULT:%.*]] = call nofpclass(inf) float @only_nofpclass_inf_return_users(float [[ARG]]) #[[ATTR14]]
; CGSCC-NEXT: ret float [[RESULT]]
;
%result = call nofpclass(inf) float @only_nofpclass_inf_return_users(float %arg)
@@ -458,7 +458,7 @@ define float @fcmp_olt_assume_one_0_callsite_arg_return(float %arg) {
; CHECK-SAME: (float returned nofpclass(nan zero) [[ARG:%.*]]) {
; CHECK-NEXT: entry:
; CHECK-NEXT: [[IS_NOT_ZERO_OR_NAN:%.*]] = fcmp one float [[ARG]], 0.000000e+00
-; CHECK-NEXT: call void @llvm.assume(i1 noundef [[IS_NOT_ZERO_OR_NAN]]) #[[ATTR13]]
+; CHECK-NEXT: call void @llvm.assume(i1 noundef [[IS_NOT_ZERO_OR_NAN]]) #[[ATTR14]]
; CHECK-NEXT: call void @extern.use(float nofpclass(nan zero) [[ARG]])
; CHECK-NEXT: ret float [[ARG]]
;
@@ -474,7 +474,7 @@ define float @fcmp_olt_assume_une_0_callsite_arg_return(float %arg) {
; CHECK-SAME: (float returned nofpclass(zero) [[ARG:%.*]]) {
; CHECK-NEXT: entry:
; CHECK-NEXT: [[IS_NOT_ZERO_OR_NAN:%.*]] = fcmp une float [[ARG]], 0.000000e+00
-; CHECK-NEXT: call void @llvm.assume(i1 noundef [[IS_NOT_ZERO_OR_NAN]]) #[[ATTR13]]
+; CHECK-NEXT: call void @llvm.assume(i1 noundef [[IS_NOT_ZERO_OR_NAN]]) #[[ATTR14]]
; CHECK-NEXT: call void @extern.use(float nofpclass(zero) [[ARG]])
; CHECK-NEXT: ret float [[ARG]]
;
@@ -489,9 +489,9 @@ define half @fcmp_assume_issubnormal_callsite_arg_return(half %arg) {
; CHECK-LABEL: define nofpclass(nan inf norm) half @fcmp_assume_issubnormal_callsite_arg_return
; CHECK-SAME: (half returned nofpclass(nan inf norm) [[ARG:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) half @llvm.fabs.f16(half nofpclass(nan inf norm) [[ARG]]) #[[ATTR13]]
+; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) half @llvm.fabs.f16(half nofpclass(nan inf norm) [[ARG]]) #[[ATTR14]]
; CHECK-NEXT: [[IS_SUBNORMAL:%.*]] = fcmp olt half [[FABS]], 0xH0400
-; CHECK-NEXT: call void @llvm.assume(i1 noundef [[IS_SUBNORMAL]]) #[[ATTR13]]
+; CHECK-NEXT: call void @llvm.assume(i1 noundef [[IS_SUBNORMAL]]) #[[ATTR14]]
; CHECK-NEXT: call void @extern.use.f16(half nofpclass(nan inf norm) [[ARG]])
; CHECK-NEXT: ret half [[ARG]]
;
@@ -525,11 +525,11 @@ define half @fcmp_assume2_callsite_arg_return(half %arg) {
; CHECK-LABEL: define nofpclass(nan ninf zero sub norm) half @fcmp_assume2_callsite_arg_return
; CHECK-SAME: (half returned nofpclass(nan ninf zero sub norm) [[ARG:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(nan ninf zero sub norm) half @llvm.fabs.f16(half nofpclass(nan ninf zero sub norm) [[ARG]]) #[[ATTR13]]
+; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(nan ninf zero sub norm) half @llvm.fabs.f16(half nofpclass(nan ninf zero sub norm) [[ARG]]) #[[ATTR14]]
; CHECK-NEXT: [[NOT_SUBNORMAL_OR_ZERO:%.*]] = fcmp oge half [[FABS]], 0xH0400
-; CHECK-NEXT: call void @llvm.assume(i1 noundef [[NOT_SUBNORMAL_OR_ZERO]]) #[[ATTR13]]
+; CHECK-NEXT: call void @llvm.assume(i1 noundef [[NOT_SUBNORMAL_OR_ZERO]]) #[[ATTR14]]
; CHECK-NEXT: [[NOT_INF:%.*]] = fcmp oeq half [[ARG]], 0xH7C00
-; CHECK-NEXT: call void @llvm.assume(i1 noundef [[NOT_INF]]) #[[ATTR13]]
+; CHECK-NEXT: call void @llvm.assume(i1 noundef [[NOT_INF]]) #[[ATTR14]]
; CHECK-NEXT: call void @extern.use.f16(half nofpclass(nan ninf zero sub norm) [[ARG]])
; CHECK-NEXT: ret half [[ARG]]
;
@@ -549,8 +549,8 @@ define float @is_fpclass_assume_arg_return(float %arg) {
; CHECK-LABEL: define nofpclass(nan pinf pzero sub nnorm) float @is_fpclass_assume_arg_return
; CHECK-SAME: (float returned nofpclass(nan pinf pzero sub nnorm) [[ARG:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CLASS_TEST:%.*]] = call i1 @llvm.is.fpclass.f32(float nofpclass(nan pinf pzero sub nnorm) [[ARG]], i32 noundef 292) #[[ATTR13]]
-; CHECK-NEXT: call void @llvm.assume(i1 noundef [[CLASS_TEST]]) #[[ATTR13]]
+; CHECK-NEXT: [[CLASS_TEST:%.*]] = call i1 @llvm.is.fpclass.f32(float nofpclass(nan pinf pzero sub nnorm) [[ARG]], i32 noundef 292) #[[ATTR14]]
+; CHECK-NEXT: call void @llvm.assume(i1 noundef [[CLASS_TEST]]) #[[ATTR14]]
; CHECK-NEXT: call void @extern.use(float nofpclass(nan pinf pzero sub nnorm) [[ARG]])
; CHECK-NEXT: ret float [[ARG]]
;
@@ -567,11 +567,11 @@ define half @assume_fcmp_fabs_with_other_fabs_assume(half %arg) {
; CHECK-LABEL: define nofpclass(nan inf norm) half @assume_fcmp_fabs_with_other_fabs_assume
; CHECK-SAME: (half returned nofpclass(nan inf norm) [[ARG:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(nan inf zero nsub norm) half @llvm.fabs.f16(half nofpclass(nan inf norm) [[ARG]]) #[[ATTR13]]
+; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(nan inf zero nsub norm) half @llvm.fabs.f16(half nofpclass(nan inf norm) [[ARG]]) #[[ATTR14]]
; CHECK-NEXT: [[UNRELATED_FABS:%.*]] = fcmp one half [[FABS]], 0xH0000
-; CHECK-NEXT: call void @llvm.assume(i1 noundef [[UNRELATED_FABS]]) #[[ATTR13]]
+; CHECK-NEXT: call void @llvm.assume(i1 noundef [[UNRELATED_FABS]]) #[[ATTR14]]
; CHECK-NEXT: [[IS_SUBNORMAL:%.*]] = fcmp olt half [[FABS]], 0xH0400
-; CHECK-NEXT: call void @llvm.assume(i1 noundef [[IS_SUBNORMAL]]) #[[ATTR13]]
+; CHECK-NEXT: call void @llvm.assume(i1 noundef [[IS_SUBNORMAL]]) #[[ATTR14]]
; CHECK-NEXT: call void @extern.use.f16(half nofpclass(nan inf norm) [[ARG]])
; CHECK-NEXT: call void @extern.use.f16(half nofpclass(nan inf zero nsub norm) [[FABS]])
; CHECK-NEXT: ret half [[ARG]]
@@ -594,13 +594,13 @@ define half @assume_fcmp_fabs_with_other_fabs_assume_fallback(half %arg) {
; CHECK-LABEL: define nofpclass(all) half @assume_fcmp_fabs_with_other_fabs_assume_fallback
; CHECK-SAME: (half returned nofpclass(all) [[ARG:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[FABS:%.*]] = call half @llvm.fabs.f16(half nofpclass(all) [[ARG]]) #[[ATTR13]]
+; CHECK-NEXT: [[FABS:%.*]] = call half @llvm.fabs.f16(half nofpclass(all) [[ARG]]) #[[ATTR14]]
; CHECK-NEXT: [[ONE_INF:%.*]] = fcmp oeq half [[ARG]], 0xH7C00
-; CHECK-NEXT: call void @llvm.assume(i1 noundef [[ONE_INF]]) #[[ATTR13]]
+; CHECK-NEXT: call void @llvm.assume(i1 noundef [[ONE_INF]]) #[[ATTR14]]
; CHECK-NEXT: [[UNRELATED_FABS:%.*]] = fcmp oeq half [[FABS]], 0xH0000
-; CHECK-NEXT: call void @llvm.assume(i1 noundef [[UNRELATED_FABS]]) #[[ATTR13]]
+; CHECK-NEXT: call void @llvm.assume(i1 noundef [[UNRELATED_FABS]]) #[[ATTR14]]
; CHECK-NEXT: [[IS_SUBNORMAL:%.*]] = fcmp olt half [[FABS]], 0xH0400
-; CHECK-NEXT: call void @llvm.assume(i1 noundef [[IS_SUBNORMAL]]) #[[ATTR13]]
+; CHECK-NEXT: call void @llvm.assume(i1 noundef [[IS_SUBNORMAL]]) #[[ATTR14]]
; CHECK-NEXT: call void @extern.use.f16(half nofpclass(all) [[ARG]])
; CHECK-NEXT: call void @extern.use.f16(half nofpclass(all) [[FABS]])
; CHECK-NEXT: ret half [[ARG]]
@@ -628,7 +628,7 @@ define float @assume_bundles(i1 %c, float %ret) {
; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[C]], label [[A:%.*]], label [[B:%.*]]
; CHECK: A:
-; CHECK-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR13]] [ "nofpclass"(float [[RET]], i32 3) ]
+; CHECK-NEXT: call void @llvm.assume(i1 noundef true) #[[ATTR14]] [ "nofpclass"(float [[RET]], i32 3) ]
; CHECK-NEXT: call void @extern.use(float nofpclass(nan) [[RET]])
; CHECK-NEXT: ret float [[RET]]
; CHECK: B:
@@ -653,7 +653,7 @@ B:
define float @returned_load(ptr %ptr) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read)
; CHECK-LABEL: define float @returned_load
-; CHECK-SAME: (ptr nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[PTR:%.*]]) #[[ATTR4:[0-9]+]] {
+; CHECK-SAME: (ptr nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[PTR:%.*]]) #[[ATTR5:[0-9]+]] {
; CHECK-NEXT: [[LOAD:%.*]] = load float, ptr [[PTR]], align 4
; CHECK-NEXT: ret float [[LOAD]]
;
@@ -664,18 +664,18 @@ define float @returned_load(ptr %ptr) {
define float @pass_nofpclass_inf_through_memory(float nofpclass(inf) %arg) {
; TUNIT: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; TUNIT-LABEL: define float @pass_nofpclass_inf_through_memory
-; TUNIT-SAME: (float nofpclass(inf) [[ARG:%.*]]) #[[ATTR2]] {
+; TUNIT-SAME: (float nofpclass(inf) [[ARG:%.*]]) #[[ATTR3]] {
; TUNIT-NEXT: [[ALLOCA:%.*]] = alloca float, align 4
; TUNIT-NEXT: store float [[ARG]], ptr [[ALLOCA]], align 4
-; TUNIT-NEXT: [[RET:%.*]] = call float @returned_load(ptr noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[ALLOCA]]) #[[ATTR15:[0-9]+]]
+; TUNIT-NEXT: [[RET:%.*]] = call float @returned_load(ptr noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[ALLOCA]]) #[[ATTR16:[0-9]+]]
; TUNIT-NEXT: ret float [[RET]]
;
; CGSCC: Function Attrs: mustprogress nofree nosync nounwind willreturn memory(none)
; CGSCC-LABEL: define float @pass_nofpclass_inf_through_memory
-; CGSCC-SAME: (float nofpclass(inf) [[ARG:%.*]]) #[[ATTR3]] {
+; CGSCC-SAME: (float nofpclass(inf) [[ARG:%.*]]) #[[ATTR4]] {
; CGSCC-NEXT: [[ALLOCA:%.*]] = alloca float, align 4
; CGSCC-NEXT: store float [[ARG]], ptr [[ALLOCA]], align 4
-; CGSCC-NEXT: [[RET:%.*]] = call float @returned_load(ptr noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[ALLOCA]]) #[[ATTR14:[0-9]+]]
+; CGSCC-NEXT: [[RET:%.*]] = call float @returned_load(ptr noalias nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[ALLOCA]]) #[[ATTR15:[0-9]+]]
; CGSCC-NEXT: ret float [[RET]]
;
%alloca = alloca float
@@ -687,8 +687,8 @@ define float @pass_nofpclass_inf_through_memory(float nofpclass(inf) %arg) {
define float @returned_fabs(float %x) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(ninf nzero nsub nnorm) float @returned_fabs
-; CHECK-SAME: (float [[X:%.*]]) #[[ATTR2]] {
-; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float [[X]]) #[[ATTR13]]
+; CHECK-SAME: (float [[X:%.*]]) #[[ATTR3]] {
+; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float [[X]]) #[[ATTR14]]
; CHECK-NEXT: ret float [[FABS]]
;
%fabs = call float @llvm.fabs.f32(float %x)
@@ -698,8 +698,8 @@ define float @returned_fabs(float %x) {
define float @returned_fabs_nosnan(float nofpclass(snan) %x) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(snan ninf nzero nsub nnorm) float @returned_fabs_nosnan
-; CHECK-SAME: (float nofpclass(snan) [[X:%.*]]) #[[ATTR2]] {
-; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(snan ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(snan) [[X]]) #[[ATTR13]]
+; CHECK-SAME: (float nofpclass(snan) [[X:%.*]]) #[[ATTR3]] {
+; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(snan ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(snan) [[X]]) #[[ATTR14]]
; CHECK-NEXT: ret float [[FABS]]
;
%fabs = call float @llvm.fabs.f32(float %x)
@@ -709,8 +709,8 @@ define float @returned_fabs_nosnan(float nofpclass(snan) %x) {
define float @returned_fabs_noqnan(float nofpclass(qnan) %x) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(qnan ninf nzero nsub nnorm) float @returned_fabs_noqnan
-; CHECK-SAME: (float nofpclass(qnan) [[X:%.*]]) #[[ATTR2]] {
-; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(qnan ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(qnan) [[X]]) #[[ATTR13]]
+; CHECK-SAME: (float nofpclass(qnan) [[X:%.*]]) #[[ATTR3]] {
+; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(qnan ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(qnan) [[X]]) #[[ATTR14]]
; CHECK-NEXT: ret float [[FABS]]
;
%fabs = call float @llvm.fabs.f32(float %x)
@@ -720,8 +720,8 @@ define float @returned_fabs_noqnan(float nofpclass(qnan) %x) {
define float @returned_fabs_nonan(float nofpclass(nan) %x) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(nan ninf nzero nsub nnorm) float @returned_fabs_nonan
-; CHECK-SAME: (float nofpclass(nan) [[X:%.*]]) #[[ATTR2]] {
-; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(nan ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(nan) [[X]]) #[[ATTR13]]
+; CHECK-SAME: (float nofpclass(nan) [[X:%.*]]) #[[ATTR3]] {
+; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(nan ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(nan) [[X]]) #[[ATTR14]]
; CHECK-NEXT: ret float [[FABS]]
;
%fabs = call float @llvm.fabs.f32(float %x)
@@ -731,8 +731,8 @@ define float @returned_fabs_nonan(float nofpclass(nan) %x) {
define float @returned_fabs_noinf(float nofpclass(inf) %x) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(inf nzero nsub nnorm) float @returned_fabs_noinf
-; CHECK-SAME: (float nofpclass(inf) [[X:%.*]]) #[[ATTR2]] {
-; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(inf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(inf) [[X]]) #[[ATTR13]]
+; CHECK-SAME: (float nofpclass(inf) [[X:%.*]]) #[[ATTR3]] {
+; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(inf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(inf) [[X]]) #[[ATTR14]]
; CHECK-NEXT: ret float [[FABS]]
;
%fabs = call float @llvm.fabs.f32(float %x)
@@ -742,8 +742,8 @@ define float @returned_fabs_noinf(float nofpclass(inf) %x) {
define float @returned_fabs_nopos(float nofpclass(psub pnorm pinf) %x) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(ninf nzero nsub nnorm) float @returned_fabs_nopos
-; CHECK-SAME: (float nofpclass(pinf psub pnorm) [[X:%.*]]) #[[ATTR2]] {
-; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(pinf psub pnorm) [[X]]) #[[ATTR13]]
+; CHECK-SAME: (float nofpclass(pinf psub pnorm) [[X:%.*]]) #[[ATTR3]] {
+; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(pinf psub pnorm) [[X]]) #[[ATTR14]]
; CHECK-NEXT: ret float [[FABS]]
;
%fabs = call float @llvm.fabs.f32(float %x)
@@ -753,8 +753,8 @@ define float @returned_fabs_nopos(float nofpclass(psub pnorm pinf) %x) {
define float @returned_fabs_nopos_nopzero(float nofpclass(psub pnorm pinf pzero) %x) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(ninf nzero nsub nnorm) float @returned_fabs_nopos_nopzero
-; CHECK-SAME: (float nofpclass(pinf pzero psub pnorm) [[X:%.*]]) #[[ATTR2]] {
-; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(pinf pzero psub pnorm) [[X]]) #[[ATTR13]]
+; CHECK-SAME: (float nofpclass(pinf pzero psub pnorm) [[X:%.*]]) #[[ATTR3]] {
+; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(pinf pzero psub pnorm) [[X]]) #[[ATTR14]]
; CHECK-NEXT: ret float [[FABS]]
;
%fabs = call float @llvm.fabs.f32(float %x)
@@ -764,8 +764,8 @@ define float @returned_fabs_nopos_nopzero(float nofpclass(psub pnorm pinf pzero)
define float @returned_fabs_nopos_nozero(float nofpclass(psub pnorm pinf zero) %x) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(ninf zero nsub nnorm) float @returned_fabs_nopos_nozero
-; CHECK-SAME: (float nofpclass(pinf zero psub pnorm) [[X:%.*]]) #[[ATTR2]] {
-; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf zero nsub nnorm) float @llvm.fabs.f32(float nofpclass(pinf zero psub pnorm) [[X]]) #[[ATTR13]]
+; CHECK-SAME: (float nofpclass(pinf zero psub pnorm) [[X:%.*]]) #[[ATTR3]] {
+; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf zero nsub nnorm) float @llvm.fabs.f32(float nofpclass(pinf zero psub pnorm) [[X]]) #[[ATTR14]]
; CHECK-NEXT: ret float [[FABS]]
;
%fabs = call float @llvm.fabs.f32(float %x)
@@ -775,8 +775,8 @@ define float @returned_fabs_nopos_nozero(float nofpclass(psub pnorm pinf zero) %
define float @returned_fabs_nopos_nonan(float nofpclass(psub pnorm pinf nan) %x) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(nan ninf nzero nsub nnorm) float @returned_fabs_nopos_nonan
-; CHECK-SAME: (float nofpclass(nan pinf psub pnorm) [[X:%.*]]) #[[ATTR2]] {
-; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(nan ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(nan pinf psub pnorm) [[X]]) #[[ATTR13]]
+; CHECK-SAME: (float nofpclass(nan pinf psub pnorm) [[X:%.*]]) #[[ATTR3]] {
+; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(nan ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(nan pinf psub pnorm) [[X]]) #[[ATTR14]]
; CHECK-NEXT: ret float [[FABS]]
;
%fabs = call float @llvm.fabs.f32(float %x)
@@ -786,8 +786,8 @@ define float @returned_fabs_nopos_nonan(float nofpclass(psub pnorm pinf nan) %x)
define float @returned_fabs_noneg(float nofpclass(nsub nnorm ninf) %x) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(ninf nzero nsub nnorm) float @returned_fabs_noneg
-; CHECK-SAME: (float nofpclass(ninf nsub nnorm) [[X:%.*]]) #[[ATTR2]] {
-; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(ninf nsub nnorm) [[X]]) #[[ATTR13]]
+; CHECK-SAME: (float nofpclass(ninf nsub nnorm) [[X:%.*]]) #[[ATTR3]] {
+; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(ninf nsub nnorm) [[X]]) #[[ATTR14]]
; CHECK-NEXT: ret float [[FABS]]
;
%fabs = call float @llvm.fabs.f32(float %x)
@@ -797,8 +797,8 @@ define float @returned_fabs_noneg(float nofpclass(nsub nnorm ninf) %x) {
define float @returned_fabs_noneg_nonzero(float nofpclass(nsub nnorm ninf nzero) %x) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(ninf nzero nsub nnorm) float @returned_fabs_noneg_nonzero
-; CHECK-SAME: (float nofpclass(ninf nzero nsub nnorm) [[X:%.*]]) #[[ATTR2]] {
-; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(ninf nzero nsub nnorm) [[X]]) #[[ATTR13]]
+; CHECK-SAME: (float nofpclass(ninf nzero nsub nnorm) [[X:%.*]]) #[[ATTR3]] {
+; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(ninf nzero nsub nnorm) [[X]]) #[[ATTR14]]
; CHECK-NEXT: ret float [[FABS]]
;
%fabs = call float @llvm.fabs.f32(float %x)
@@ -808,8 +808,8 @@ define float @returned_fabs_noneg_nonzero(float nofpclass(nsub nnorm ninf nzero)
define float @returned_fabs_noneg_nozero(float nofpclass(nsub nnorm ninf zero) %x) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(ninf zero nsub nnorm) float @returned_fabs_noneg_nozero
-; CHECK-SAME: (float nofpclass(ninf zero nsub nnorm) [[X:%.*]]) #[[ATTR2]] {
-; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf zero nsub nnorm) float @llvm.fabs.f32(float nofpclass(ninf zero nsub nnorm) [[X]]) #[[ATTR13]]
+; CHECK-SAME: (float nofpclass(ninf zero nsub nnorm) [[X:%.*]]) #[[ATTR3]] {
+; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf zero nsub nnorm) float @llvm.fabs.f32(float nofpclass(ninf zero nsub nnorm) [[X]]) #[[ATTR14]]
; CHECK-NEXT: ret float [[FABS]]
;
%fabs = call float @llvm.fabs.f32(float %x)
@@ -819,8 +819,8 @@ define float @returned_fabs_noneg_nozero(float nofpclass(nsub nnorm ninf zero) %
define float @returned_fabs_noneg_nonan(float nofpclass(nsub nnorm ninf nan) %x) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(nan ninf nzero nsub nnorm) float @returned_fabs_noneg_nonan
-; CHECK-SAME: (float nofpclass(nan ninf nsub nnorm) [[X:%.*]]) #[[ATTR2]] {
-; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(nan ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(nan ninf nsub nnorm) [[X]]) #[[ATTR13]]
+; CHECK-SAME: (float nofpclass(nan ninf nsub nnorm) [[X:%.*]]) #[[ATTR3]] {
+; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(nan ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(nan ninf nsub nnorm) [[X]]) #[[ATTR14]]
; CHECK-NEXT: ret float [[FABS]]
;
%fabs = call float @llvm.fabs.f32(float %x)
@@ -830,8 +830,8 @@ define float @returned_fabs_noneg_nonan(float nofpclass(nsub nnorm ninf nan) %x)
define float @returned_fabs_nonsub_nopnorm_nonzero(float nofpclass(nsub pnorm nzero) %x) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(ninf nzero nsub nnorm) float @returned_fabs_nonsub_nopnorm_nonzero
-; CHECK-SAME: (float nofpclass(nzero nsub pnorm) [[X:%.*]]) #[[ATTR2]] {
-; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(nzero nsub pnorm) [[X]]) #[[ATTR13]]
+; CHECK-SAME: (float nofpclass(nzero nsub pnorm) [[X:%.*]]) #[[ATTR3]] {
+; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(nzero nsub pnorm) [[X]]) #[[ATTR14]]
; CHECK-NEXT: ret float [[FABS]]
;
%fabs = call float @llvm.fabs.f32(float %x)
@@ -841,8 +841,8 @@ define float @returned_fabs_nonsub_nopnorm_nonzero(float nofpclass(nsub pnorm nz
define float @returned_fabs_nopsub_nonnorm_nopzero(float nofpclass(psub nnorm pzero) %x) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(ninf nzero nsub nnorm) float @returned_fabs_nopsub_nonnorm_nopzero
-; CHECK-SAME: (float nofpclass(pzero psub nnorm) [[X:%.*]]) #[[ATTR2]] {
-; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(pzero psub nnorm) [[X]]) #[[ATTR13]]
+; CHECK-SAME: (float nofpclass(pzero psub nnorm) [[X:%.*]]) #[[ATTR3]] {
+; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(pzero psub nnorm) [[X]]) #[[ATTR14]]
; CHECK-NEXT: ret float [[FABS]]
;
%fabs = call float @llvm.fabs.f32(float %x)
@@ -852,8 +852,8 @@ define float @returned_fabs_nopsub_nonnorm_nopzero(float nofpclass(psub nnorm pz
define float @returned_fabs_nonnorm_nozero(float nofpclass(nnorm nzero) %x) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(ninf nzero nsub nnorm) float @returned_fabs_nonnorm_nozero
-; CHECK-SAME: (float nofpclass(nzero nnorm) [[X:%.*]]) #[[ATTR2]] {
-; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(nzero nnorm) [[X]]) #[[ATTR13]]
+; CHECK-SAME: (float nofpclass(nzero nnorm) [[X:%.*]]) #[[ATTR3]] {
+; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(nzero nnorm) [[X]]) #[[ATTR14]]
; CHECK-NEXT: ret float [[FABS]]
;
%fabs = call float @llvm.fabs.f32(float %x)
@@ -863,7 +863,7 @@ define float @returned_fabs_nonnorm_nozero(float nofpclass(nnorm nzero) %x) {
define float @returned_fneg(float %x) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define float @returned_fneg
-; CHECK-SAME: (float [[X:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (float [[X:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[FNEG:%.*]] = fneg float [[X]]
; CHECK-NEXT: ret float [[FNEG]]
;
@@ -874,7 +874,7 @@ define float @returned_fneg(float %x) {
define float @returned_fneg_nosnan(float nofpclass(snan) %x) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(snan) float @returned_fneg_nosnan
-; CHECK-SAME: (float nofpclass(snan) [[X:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (float nofpclass(snan) [[X:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[FNEG:%.*]] = fneg float [[X]]
; CHECK-NEXT: ret float [[FNEG]]
;
@@ -885,7 +885,7 @@ define float @returned_fneg_nosnan(float nofpclass(snan) %x) {
define float @returned_fneg_noqnan(float nofpclass(qnan) %x) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(qnan) float @returned_fneg_noqnan
-; CHECK-SAME: (float nofpclass(qnan) [[X:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (float nofpclass(qnan) [[X:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[FNEG:%.*]] = fneg float [[X]]
; CHECK-NEXT: ret float [[FNEG]]
;
@@ -896,7 +896,7 @@ define float @returned_fneg_noqnan(float nofpclass(qnan) %x) {
define float @returned_fneg_nosnan_ninf_flag(float nofpclass(snan) %x) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(snan inf) float @returned_fneg_nosnan_ninf_flag
-; CHECK-SAME: (float nofpclass(snan) [[X:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (float nofpclass(snan) [[X:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[FNEG:%.*]] = fneg ninf float [[X]]
; CHECK-NEXT: ret float [[FNEG]]
;
@@ -907,7 +907,7 @@ define float @returned_fneg_nosnan_ninf_flag(float nofpclass(snan) %x) {
define float @returned_fneg_nonan(float nofpclass(nan) %x) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(nan) float @returned_fneg_nonan
-; CHECK-SAME: (float nofpclass(nan) [[X:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (float nofpclass(nan) [[X:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[FNEG:%.*]] = fneg float [[X]]
; CHECK-NEXT: ret float [[FNEG]]
;
@@ -918,7 +918,7 @@ define float @returned_fneg_nonan(float nofpclass(nan) %x) {
define float @returned_fneg_noinf(float nofpclass(inf) %x) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(inf) float @returned_fneg_noinf
-; CHECK-SAME: (float nofpclass(inf) [[X:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (float nofpclass(inf) [[X:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[FNEG:%.*]] = fneg float [[X]]
; CHECK-NEXT: ret float [[FNEG]]
;
@@ -929,7 +929,7 @@ define float @returned_fneg_noinf(float nofpclass(inf) %x) {
define float @returned_fneg_noneg(float nofpclass(ninf nsub nnorm nzero) %x) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(pinf pzero psub pnorm) float @returned_fneg_noneg
-; CHECK-SAME: (float nofpclass(ninf nzero nsub nnorm) [[X:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (float nofpclass(ninf nzero nsub nnorm) [[X:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[FNEG:%.*]] = fneg float [[X]]
; CHECK-NEXT: ret float [[FNEG]]
;
@@ -940,7 +940,7 @@ define float @returned_fneg_noneg(float nofpclass(ninf nsub nnorm nzero) %x) {
define float @returned_fneg_noneg_nnan_flag(float nofpclass(ninf nsub nnorm nzero) %x) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(nan pinf pzero psub pnorm) float @returned_fneg_noneg_nnan_flag
-; CHECK-SAME: (float nofpclass(ninf nzero nsub nnorm) [[X:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (float nofpclass(ninf nzero nsub nnorm) [[X:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[FNEG:%.*]] = fneg nnan float [[X]]
; CHECK-NEXT: ret float [[FNEG]]
;
@@ -951,7 +951,7 @@ define float @returned_fneg_noneg_nnan_flag(float nofpclass(ninf nsub nnorm nzer
define float @returned_fneg_nonsubnnorm(float nofpclass(nsub nnorm) %x) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(psub pnorm) float @returned_fneg_nonsubnnorm
-; CHECK-SAME: (float nofpclass(nsub nnorm) [[X:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (float nofpclass(nsub nnorm) [[X:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[FNEG:%.*]] = fneg float [[X]]
; CHECK-NEXT: ret float [[FNEG]]
;
@@ -962,7 +962,7 @@ define float @returned_fneg_nonsubnnorm(float nofpclass(nsub nnorm) %x) {
define float @returned_fneg_nopos(float nofpclass(pinf psub pnorm pzero) %x) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(ninf nzero nsub nnorm) float @returned_fneg_nopos
-; CHECK-SAME: (float nofpclass(pinf pzero psub pnorm) [[X:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (float nofpclass(pinf pzero psub pnorm) [[X:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[FNEG:%.*]] = fneg float [[X]]
; CHECK-NEXT: ret float [[FNEG]]
;
@@ -973,7 +973,7 @@ define float @returned_fneg_nopos(float nofpclass(pinf psub pnorm pzero) %x) {
define float @returned_fneg_nopnormpsub(float nofpclass(psub pnorm) %x) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(nsub nnorm) float @returned_fneg_nopnormpsub
-; CHECK-SAME: (float nofpclass(psub pnorm) [[X:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (float nofpclass(psub pnorm) [[X:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[FNEG:%.*]] = fneg float [[X]]
; CHECK-NEXT: ret float [[FNEG]]
;
@@ -984,7 +984,7 @@ define float @returned_fneg_nopnormpsub(float nofpclass(psub pnorm) %x) {
define float @returned_fneg_mixed(float nofpclass(psub nnorm nzero qnan ninf) %x) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(qnan pinf pzero nsub pnorm) float @returned_fneg_mixed
-; CHECK-SAME: (float nofpclass(qnan ninf nzero psub nnorm) [[X:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (float nofpclass(qnan ninf nzero psub nnorm) [[X:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[FNEG:%.*]] = fneg float [[X]]
; CHECK-NEXT: ret float [[FNEG]]
;
@@ -995,8 +995,8 @@ define float @returned_fneg_mixed(float nofpclass(psub nnorm nzero qnan ninf) %x
define float @returned_fneg_fabs(float %x) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(pinf pzero psub pnorm) float @returned_fneg_fabs
-; CHECK-SAME: (float [[X:%.*]]) #[[ATTR2]] {
-; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float [[X]]) #[[ATTR13]]
+; CHECK-SAME: (float [[X:%.*]]) #[[ATTR3]] {
+; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float [[X]]) #[[ATTR14]]
; CHECK-NEXT: [[FNEG_FABS:%.*]] = fneg float [[FABS]]
; CHECK-NEXT: ret float [[FNEG_FABS]]
;
@@ -1008,8 +1008,8 @@ define float @returned_fneg_fabs(float %x) {
define float @returned_fneg_fabs_nosnan(float nofpclass(snan) %x) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(snan pinf pzero psub pnorm) float @returned_fneg_fabs_nosnan
-; CHECK-SAME: (float nofpclass(snan) [[X:%.*]]) #[[ATTR2]] {
-; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(snan ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(snan) [[X]]) #[[ATTR13]]
+; CHECK-SAME: (float nofpclass(snan) [[X:%.*]]) #[[ATTR3]] {
+; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(snan ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(snan) [[X]]) #[[ATTR14]]
; CHECK-NEXT: [[FNEG_FABS:%.*]] = fneg float [[FABS]]
; CHECK-NEXT: ret float [[FNEG_FABS]]
;
@@ -1021,8 +1021,8 @@ define float @returned_fneg_fabs_nosnan(float nofpclass(snan) %x) {
define float @returned_fneg_fabs_noqnan(float nofpclass(qnan) %x) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(qnan pinf pzero psub pnorm) float @returned_fneg_fabs_noqnan
-; CHECK-SAME: (float nofpclass(qnan) [[X:%.*]]) #[[ATTR2]] {
-; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(qnan ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(qnan) [[X]]) #[[ATTR13]]
+; CHECK-SAME: (float nofpclass(qnan) [[X:%.*]]) #[[ATTR3]] {
+; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(qnan ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(qnan) [[X]]) #[[ATTR14]]
; CHECK-NEXT: [[FNEG_FABS:%.*]] = fneg float [[FABS]]
; CHECK-NEXT: ret float [[FNEG_FABS]]
;
@@ -1034,8 +1034,8 @@ define float @returned_fneg_fabs_noqnan(float nofpclass(qnan) %x) {
define float @returned_fneg_fabs_nonan(float nofpclass(nan) %x) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(nan pinf pzero psub pnorm) float @returned_fneg_fabs_nonan
-; CHECK-SAME: (float nofpclass(nan) [[X:%.*]]) #[[ATTR2]] {
-; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(nan ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(nan) [[X]]) #[[ATTR13]]
+; CHECK-SAME: (float nofpclass(nan) [[X:%.*]]) #[[ATTR3]] {
+; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(nan ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(nan) [[X]]) #[[ATTR14]]
; CHECK-NEXT: [[FNEG_FABS:%.*]] = fneg float [[FABS]]
; CHECK-NEXT: ret float [[FNEG_FABS]]
;
@@ -1047,8 +1047,8 @@ define float @returned_fneg_fabs_nonan(float nofpclass(nan) %x) {
define float @returned_fneg_fabs_noneg(float nofpclass(ninf nsub nnorm nzero) %x) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(pinf pzero psub pnorm) float @returned_fneg_fabs_noneg
-; CHECK-SAME: (float nofpclass(ninf nzero nsub nnorm) [[X:%.*]]) #[[ATTR2]] {
-; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(ninf nzero nsub nnorm) [[X]]) #[[ATTR13]]
+; CHECK-SAME: (float nofpclass(ninf nzero nsub nnorm) [[X:%.*]]) #[[ATTR3]] {
+; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(ninf nzero nsub nnorm) [[X]]) #[[ATTR14]]
; CHECK-NEXT: [[FNEG_FABS:%.*]] = fneg float [[FABS]]
; CHECK-NEXT: ret float [[FNEG_FABS]]
;
@@ -1060,8 +1060,8 @@ define float @returned_fneg_fabs_noneg(float nofpclass(ninf nsub nnorm nzero) %x
define float @returned_fneg_fabs_nopos(float nofpclass(pinf psub pnorm pzero) %x) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(pinf pzero psub pnorm) float @returned_fneg_fabs_nopos
-; CHECK-SAME: (float nofpclass(pinf pzero psub pnorm) [[X:%.*]]) #[[ATTR2]] {
-; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(pinf pzero psub pnorm) [[X]]) #[[ATTR13]]
+; CHECK-SAME: (float nofpclass(pinf pzero psub pnorm) [[X:%.*]]) #[[ATTR3]] {
+; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(pinf pzero psub pnorm) [[X]]) #[[ATTR14]]
; CHECK-NEXT: [[FNEG_FABS:%.*]] = fneg float [[FABS]]
; CHECK-NEXT: ret float [[FNEG_FABS]]
;
@@ -1073,8 +1073,8 @@ define float @returned_fneg_fabs_nopos(float nofpclass(pinf psub pnorm pzero) %x
define float @returned_fneg_fabs_mixed(float nofpclass(psub nnorm nzero qnan ninf) %x) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(qnan pinf pzero psub pnorm) float @returned_fneg_fabs_mixed
-; CHECK-SAME: (float nofpclass(qnan ninf nzero psub nnorm) [[X:%.*]]) #[[ATTR2]] {
-; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(qnan ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(qnan ninf nzero psub nnorm) [[X]]) #[[ATTR13]]
+; CHECK-SAME: (float nofpclass(qnan ninf nzero psub nnorm) [[X:%.*]]) #[[ATTR3]] {
+; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(qnan ninf nzero nsub nnorm) float @llvm.fabs.f32(float nofpclass(qnan ninf nzero psub nnorm) [[X]]) #[[ATTR14]]
; CHECK-NEXT: [[FNEG_FABS:%.*]] = fneg float [[FABS]]
; CHECK-NEXT: ret float [[FNEG_FABS]]
;
@@ -1086,8 +1086,8 @@ define float @returned_fneg_fabs_mixed(float nofpclass(psub nnorm nzero qnan nin
define float @returned_fneg_fabs_ninf_flag_fabs(float %x) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(inf pzero psub pnorm) float @returned_fneg_fabs_ninf_flag_fabs
-; CHECK-SAME: (float [[X:%.*]]) #[[ATTR2]] {
-; CHECK-NEXT: [[FABS:%.*]] = call ninf nofpclass(inf nzero nsub nnorm) float @llvm.fabs.f32(float [[X]]) #[[ATTR13]]
+; CHECK-SAME: (float [[X:%.*]]) #[[ATTR3]] {
+; CHECK-NEXT: [[FABS:%.*]] = call ninf nofpclass(inf nzero nsub nnorm) float @llvm.fabs.f32(float [[X]]) #[[ATTR14]]
; CHECK-NEXT: [[FNEG_FABS:%.*]] = fneg float [[FABS]]
; CHECK-NEXT: ret float [[FNEG_FABS]]
;
@@ -1099,8 +1099,8 @@ define float @returned_fneg_fabs_ninf_flag_fabs(float %x) {
define float @returned_fneg_fabs_ninf_flag_fneg(float %x) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(inf pzero psub pnorm) float @returned_fneg_fabs_ninf_flag_fneg
-; CHECK-SAME: (float [[X:%.*]]) #[[ATTR2]] {
-; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float [[X]]) #[[ATTR13]]
+; CHECK-SAME: (float [[X:%.*]]) #[[ATTR3]] {
+; CHECK-NEXT: [[FABS:%.*]] = call nofpclass(ninf nzero nsub nnorm) float @llvm.fabs.f32(float [[X]]) #[[ATTR14]]
; CHECK-NEXT: [[FNEG_FABS:%.*]] = fneg ninf float [[FABS]]
; CHECK-NEXT: ret float [[FNEG_FABS]]
;
@@ -1112,7 +1112,7 @@ define float @returned_fneg_fabs_ninf_flag_fneg(float %x) {
define float @uitofp_i32_to_f32(i32 %arg) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(nan inf nzero sub nnorm) float @uitofp_i32_to_f32
-; CHECK-SAME: (i32 [[ARG:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (i32 [[ARG:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[CVT:%.*]] = uitofp i32 [[ARG]] to float
; CHECK-NEXT: ret float [[CVT]]
;
@@ -1123,7 +1123,7 @@ define float @uitofp_i32_to_f32(i32 %arg) {
define float @sitofp_i32_to_f32(i32 %arg) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(nan inf nzero sub) float @sitofp_i32_to_f32
-; CHECK-SAME: (i32 [[ARG:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (i32 [[ARG:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[CVT:%.*]] = sitofp i32 [[ARG]] to float
; CHECK-NEXT: ret float [[CVT]]
;
@@ -1134,7 +1134,7 @@ define float @sitofp_i32_to_f32(i32 %arg) {
define <2 x float> @uitofp_v2i32_to_v2f32(<2 x i32> %arg) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(nan inf nzero sub nnorm) <2 x float> @uitofp_v2i32_to_v2f32
-; CHECK-SAME: (<2 x i32> [[ARG:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (<2 x i32> [[ARG:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[CVT:%.*]] = uitofp <2 x i32> [[ARG]] to <2 x float>
; CHECK-NEXT: ret <2 x float> [[CVT]]
;
@@ -1145,7 +1145,7 @@ define <2 x float> @uitofp_v2i32_to_v2f32(<2 x i32> %arg) {
define <2 x float> @sitofp_v2i32_to_v2i32(<2 x i32> %arg) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(nan inf nzero sub) <2 x float> @sitofp_v2i32_to_v2i32
-; CHECK-SAME: (<2 x i32> [[ARG:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (<2 x i32> [[ARG:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[CVT:%.*]] = sitofp <2 x i32> [[ARG]] to <2 x float>
; CHECK-NEXT: ret <2 x float> [[CVT]]
;
@@ -1156,7 +1156,7 @@ define <2 x float> @sitofp_v2i32_to_v2i32(<2 x i32> %arg) {
define half @uitofp_i17_to_f16(i17 %arg) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(nan ninf nzero sub nnorm) half @uitofp_i17_to_f16
-; CHECK-SAME: (i17 [[ARG:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (i17 [[ARG:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[CVT:%.*]] = uitofp i17 [[ARG]] to half
; CHECK-NEXT: ret half [[CVT]]
;
@@ -1167,7 +1167,7 @@ define half @uitofp_i17_to_f16(i17 %arg) {
define half @sitofp_i17_to_f16(i17 %arg) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(nan nzero sub) half @sitofp_i17_to_f16
-; CHECK-SAME: (i17 [[ARG:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (i17 [[ARG:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[CVT:%.*]] = sitofp i17 [[ARG]] to half
; CHECK-NEXT: ret half [[CVT]]
;
@@ -1178,7 +1178,7 @@ define half @sitofp_i17_to_f16(i17 %arg) {
define <2 x half> @uitofp_v2i17_to_v2f16(<2 x i17> %arg) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(nan ninf nzero sub nnorm) <2 x half> @uitofp_v2i17_to_v2f16
-; CHECK-SAME: (<2 x i17> [[ARG:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (<2 x i17> [[ARG:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[CVT:%.*]] = uitofp <2 x i17> [[ARG]] to <2 x half>
; CHECK-NEXT: ret <2 x half> [[CVT]]
;
@@ -1189,7 +1189,7 @@ define <2 x half> @uitofp_v2i17_to_v2f16(<2 x i17> %arg) {
define <2 x half> @sitofp_v2i17_to_v2i17(<2 x i17> %arg) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(nan nzero sub) <2 x half> @sitofp_v2i17_to_v2i17
-; CHECK-SAME: (<2 x i17> [[ARG:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (<2 x i17> [[ARG:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[CVT:%.*]] = sitofp <2 x i17> [[ARG]] to <2 x half>
; CHECK-NEXT: ret <2 x half> [[CVT]]
;
@@ -1202,9 +1202,9 @@ define float @assume_intersection_not_zero_and_not_nan(float %arg) {
; CHECK-SAME: (float returned nofpclass(nan zero) [[ARG:%.*]]) {
; CHECK-NEXT: entry:
; CHECK-NEXT: [[IS_NOT_ZERO_OR_NAN:%.*]] = fcmp une float [[ARG]], 0.000000e+00
-; CHECK-NEXT: call void @llvm.assume(i1 noundef [[IS_NOT_ZERO_OR_NAN]]) #[[ATTR13]]
+; CHECK-NEXT: call void @llvm.assume(i1 noundef [[IS_NOT_ZERO_OR_NAN]]) #[[ATTR14]]
; CHECK-NEXT: [[IS_ORD:%.*]] = fcmp ord float [[ARG]], 0.000000e+00
-; CHECK-NEXT: call void @llvm.assume(i1 noundef [[IS_ORD]]) #[[ATTR13]]
+; CHECK-NEXT: call void @llvm.assume(i1 noundef [[IS_ORD]]) #[[ATTR14]]
; CHECK-NEXT: call void @extern.use(float nofpclass(nan zero) [[ARG]])
; CHECK-NEXT: ret float [[ARG]]
;
@@ -1221,10 +1221,10 @@ define float @assume_intersection_class(float %arg) {
; CHECK-LABEL: define nofpclass(nan inf zero sub nnorm) float @assume_intersection_class
; CHECK-SAME: (float returned nofpclass(nan inf zero sub nnorm) [[ARG:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[POS_NORMAL_OR_POS_SUBNORMAL:%.*]] = call i1 @llvm.is.fpclass.f32(float nofpclass(nan inf zero sub nnorm) [[ARG]], i32 noundef 384) #[[ATTR13]]
-; CHECK-NEXT: call void @llvm.assume(i1 noundef [[POS_NORMAL_OR_POS_SUBNORMAL]]) #[[ATTR13]]
-; CHECK-NEXT: [[IS_NORMAL:%.*]] = call i1 @llvm.is.fpclass.f32(float nofpclass(nan inf zero sub nnorm) [[ARG]], i32 noundef 264) #[[ATTR13]]
-; CHECK-NEXT: call void @llvm.assume(i1 noundef [[IS_NORMAL]]) #[[ATTR13]]
+; CHECK-NEXT: [[POS_NORMAL_OR_POS_SUBNORMAL:%.*]] = call i1 @llvm.is.fpclass.f32(float nofpclass(nan inf zero sub nnorm) [[ARG]], i32 noundef 384) #[[ATTR14]]
+; CHECK-NEXT: call void @llvm.assume(i1 noundef [[POS_NORMAL_OR_POS_SUBNORMAL]]) #[[ATTR14]]
+; CHECK-NEXT: [[IS_NORMAL:%.*]] = call i1 @llvm.is.fpclass.f32(float nofpclass(nan inf zero sub nnorm) [[ARG]], i32 noundef 264) #[[ATTR14]]
+; CHECK-NEXT: call void @llvm.assume(i1 noundef [[IS_NORMAL]]) #[[ATTR14]]
; CHECK-NEXT: call void @extern.use(float nofpclass(nan inf zero sub nnorm) [[ARG]])
; CHECK-NEXT: ret float [[ARG]]
;
@@ -1242,10 +1242,10 @@ define float @assume_intersection_none(float %arg) {
; CHECK-LABEL: define nofpclass(all) float @assume_intersection_none
; CHECK-SAME: (float returned nofpclass(all) [[ARG:%.*]]) {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CLASS1:%.*]] = call i1 @llvm.is.fpclass.f32(float nofpclass(all) [[ARG]], i32 noundef 682) #[[ATTR13]]
-; CHECK-NEXT: call void @llvm.assume(i1 noundef [[CLASS1]]) #[[ATTR13]]
-; CHECK-NEXT: [[CLASS2:%.*]] = call i1 @llvm.is.fpclass.f32(float nofpclass(all) [[ARG]], i32 noundef 341) #[[ATTR13]]
-; CHECK-NEXT: call void @llvm.assume(i1 noundef [[CLASS2]]) #[[ATTR13]]
+; CHECK-NEXT: [[CLASS1:%.*]] = call i1 @llvm.is.fpclass.f32(float nofpclass(all) [[ARG]], i32 noundef 682) #[[ATTR14]]
+; CHECK-NEXT: call void @llvm.assume(i1 noundef [[CLASS1]]) #[[ATTR14]]
+; CHECK-NEXT: [[CLASS2:%.*]] = call i1 @llvm.is.fpclass.f32(float nofpclass(all) [[ARG]], i32 noundef 341) #[[ATTR14]]
+; CHECK-NEXT: call void @llvm.assume(i1 noundef [[CLASS2]]) #[[ATTR14]]
; CHECK-NEXT: call void @extern.use(float nofpclass(all) [[ARG]])
; CHECK-NEXT: ret float [[ARG]]
;
@@ -1261,7 +1261,7 @@ entry:
define float @returned_extractelement_dynamic_index(<4 x float> nofpclass(nan) %vec, i32 %idx) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(nan) float @returned_extractelement_dynamic_index
-; CHECK-SAME: (<4 x float> nofpclass(nan) [[VEC:%.*]], i32 [[IDX:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (<4 x float> nofpclass(nan) [[VEC:%.*]], i32 [[IDX:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[EXTRACT:%.*]] = extractelement <4 x float> [[VEC]], i32 [[IDX]]
; CHECK-NEXT: ret float [[EXTRACT]]
;
@@ -1272,7 +1272,7 @@ define float @returned_extractelement_dynamic_index(<4 x float> nofpclass(nan) %
define float @returned_extractelement_index0(<4 x float> nofpclass(nan) %vec) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(nan) float @returned_extractelement_index0
-; CHECK-SAME: (<4 x float> nofpclass(nan) [[VEC:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (<4 x float> nofpclass(nan) [[VEC:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[EXTRACT:%.*]] = extractelement <4 x float> [[VEC]], i32 0
; CHECK-NEXT: ret float [[EXTRACT]]
;
@@ -1283,7 +1283,7 @@ define float @returned_extractelement_index0(<4 x float> nofpclass(nan) %vec) {
define float @returned_extractelement_index_oob(<4 x float> nofpclass(nan) %vec) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(nan) float @returned_extractelement_index_oob
-; CHECK-SAME: (<4 x float> nofpclass(nan) [[VEC:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (<4 x float> nofpclass(nan) [[VEC:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[EXTRACT:%.*]] = extractelement <4 x float> [[VEC]], i32 5
; CHECK-NEXT: ret float [[EXTRACT]]
;
@@ -1294,7 +1294,7 @@ define float @returned_extractelement_index_oob(<4 x float> nofpclass(nan) %vec)
define float @returned_extractelement_scalable(<vscale x 4 x float> nofpclass(nan) %vec) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define float @returned_extractelement_scalable
-; CHECK-SAME: (<vscale x 4 x float> nofpclass(nan) [[VEC:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (<vscale x 4 x float> nofpclass(nan) [[VEC:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[EXTRACT:%.*]] = extractelement <vscale x 4 x float> [[VEC]], i32 0
; CHECK-NEXT: ret float [[EXTRACT]]
;
@@ -1305,7 +1305,7 @@ define float @returned_extractelement_scalable(<vscale x 4 x float> nofpclass(na
define float @returned_extractvalue([4 x float] nofpclass(nan) %array) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(nan) float @returned_extractvalue
-; CHECK-SAME: ([4 x float] nofpclass(nan) [[ARRAY:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: ([4 x float] nofpclass(nan) [[ARRAY:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[EXTRACT:%.*]] = extractvalue [4 x float] [[ARRAY]], 0
; CHECK-NEXT: ret float [[EXTRACT]]
;
@@ -1316,7 +1316,7 @@ define float @returned_extractvalue([4 x float] nofpclass(nan) %array) {
define float @return_nofpclass_freeze_nan_arg(float nofpclass(nan) %arg) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define noundef float @return_nofpclass_freeze_nan_arg
-; CHECK-SAME: (float nofpclass(nan) [[ARG:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (float nofpclass(nan) [[ARG:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[FREEZE:%.*]] = freeze float [[ARG]]
; CHECK-NEXT: ret float [[FREEZE]]
;
@@ -1327,7 +1327,7 @@ define float @return_nofpclass_freeze_nan_arg(float nofpclass(nan) %arg) {
define float @return_nofpclass_extractelement_freeze_pinf_arg(<2 x float> nofpclass(pinf) %arg) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define noundef float @return_nofpclass_extractelement_freeze_pinf_arg
-; CHECK-SAME: (<2 x float> nofpclass(pinf) [[ARG:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (<2 x float> nofpclass(pinf) [[ARG:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[FREEZE:%.*]] = freeze <2 x float> [[ARG]]
; CHECK-NEXT: [[ELT:%.*]] = extractelement <2 x float> [[FREEZE]], i32 0
; CHECK-NEXT: ret float [[ELT]]
@@ -1340,7 +1340,7 @@ define float @return_nofpclass_extractelement_freeze_pinf_arg(<2 x float> nofpcl
define <4 x float> @insertelement_constant_chain() {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(nan ninf nzero sub) <4 x float> @insertelement_constant_chain
-; CHECK-SAME: () #[[ATTR2]] {
+; CHECK-SAME: () #[[ATTR3]] {
; CHECK-NEXT: [[INS_0:%.*]] = insertelement <4 x float> poison, float 1.000000e+00, i32 0
; CHECK-NEXT: [[INS_1:%.*]] = insertelement <4 x float> [[INS_0]], float 0.000000e+00, i32 1
; CHECK-NEXT: [[INS_2:%.*]] = insertelement <4 x float> [[INS_1]], float -9.000000e+00, i32 2
@@ -1357,7 +1357,7 @@ define <4 x float> @insertelement_constant_chain() {
define <vscale x 4 x float> @insertelement_scalable_constant_chain() {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define <vscale x 4 x float> @insertelement_scalable_constant_chain
-; CHECK-SAME: () #[[ATTR2]] {
+; CHECK-SAME: () #[[ATTR3]] {
; CHECK-NEXT: [[INS_0:%.*]] = insertelement <vscale x 4 x float> poison, float 1.000000e+00, i32 0
; CHECK-NEXT: [[INS_1:%.*]] = insertelement <vscale x 4 x float> [[INS_0]], float 0.000000e+00, i32 1
; CHECK-NEXT: [[INS_2:%.*]] = insertelement <vscale x 4 x float> [[INS_1]], float -9.000000e+00, i32 2
@@ -1374,7 +1374,7 @@ define <vscale x 4 x float> @insertelement_scalable_constant_chain() {
define <4 x float> @insertelement_unknown_base(<4 x float> %arg0) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define <4 x float> @insertelement_unknown_base
-; CHECK-SAME: (<4 x float> [[ARG0:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (<4 x float> [[ARG0:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[INSERT:%.*]] = insertelement <4 x float> [[ARG0]], float 0.000000e+00, i32 1
; CHECK-NEXT: ret <4 x float> [[INSERT]]
;
@@ -1385,7 +1385,7 @@ define <4 x float> @insertelement_unknown_base(<4 x float> %arg0) {
define float @insertelement_extractelement_same(<4 x float> %arg0) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(nan inf nzero sub norm) float @insertelement_extractelement_same
-; CHECK-SAME: (<4 x float> [[ARG0:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (<4 x float> [[ARG0:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[INSERT:%.*]] = insertelement <4 x float> [[ARG0]], float 0.000000e+00, i32 1
; CHECK-NEXT: [[EXTRACT:%.*]] = extractelement <4 x float> [[INSERT]], i32 1
; CHECK-NEXT: ret float [[EXTRACT]]
@@ -1398,7 +1398,7 @@ define float @insertelement_extractelement_same(<4 x float> %arg0) {
define float @insertelement_extractelement_
diff erent(<4 x float> nofpclass(zero) %arg0) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(zero) float @insertelement_extractelement_
diff erent
-; CHECK-SAME: (<4 x float> nofpclass(zero) [[ARG0:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (<4 x float> nofpclass(zero) [[ARG0:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[INSERT:%.*]] = insertelement <4 x float> [[ARG0]], float 0.000000e+00, i32 1
; CHECK-NEXT: [[EXTRACT:%.*]] = extractelement <4 x float> [[INSERT]], i32 2
; CHECK-NEXT: ret float [[EXTRACT]]
@@ -1411,7 +1411,7 @@ define float @insertelement_extractelement_
diff erent(<4 x float> nofpclass(zero)
define float @insertelement_extractelement_unknown(<4 x float> nofpclass(zero) %arg0, i32 %idx) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(nzero) float @insertelement_extractelement_unknown
-; CHECK-SAME: (<4 x float> nofpclass(zero) [[ARG0:%.*]], i32 [[IDX:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (<4 x float> nofpclass(zero) [[ARG0:%.*]], i32 [[IDX:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[INSERT:%.*]] = insertelement <4 x float> [[ARG0]], float 0.000000e+00, i32 1
; CHECK-NEXT: [[EXTRACT:%.*]] = extractelement <4 x float> [[INSERT]], i32 [[IDX]]
; CHECK-NEXT: ret float [[EXTRACT]]
@@ -1424,7 +1424,7 @@ define float @insertelement_extractelement_unknown(<4 x float> nofpclass(zero) %
define <4 x float> @insertelement_index_oob_chain() {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define <4 x float> @insertelement_index_oob_chain
-; CHECK-SAME: () #[[ATTR2]] {
+; CHECK-SAME: () #[[ATTR3]] {
; CHECK-NEXT: [[INSERT:%.*]] = insertelement <4 x float> zeroinitializer, float 0x7FF0000000000000, i32 4
; CHECK-NEXT: ret <4 x float> [[INSERT]]
;
@@ -1435,7 +1435,7 @@ define <4 x float> @insertelement_index_oob_chain() {
define <2 x float> @multiple_extractelement(<4 x float> nofpclass(zero) %arg0) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(zero) <2 x float> @multiple_extractelement
-; CHECK-SAME: (<4 x float> nofpclass(zero) [[ARG0:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (<4 x float> nofpclass(zero) [[ARG0:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[INSERT:%.*]] = insertelement <4 x float> [[ARG0]], float 0.000000e+00, i32 1
; CHECK-NEXT: [[EXTRACT2:%.*]] = extractelement <4 x float> [[INSERT]], i32 2
; CHECK-NEXT: [[EXTRACT3:%.*]] = extractelement <4 x float> [[INSERT]], i32 3
@@ -1455,7 +1455,7 @@ define <2 x float> @multiple_extractelement(<4 x float> nofpclass(zero) %arg0) {
define <4 x float> @shufflevector_constexpr() {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define <4 x float> @shufflevector_constexpr
-; CHECK-SAME: () #[[ATTR2]] {
+; CHECK-SAME: () #[[ATTR3]] {
; CHECK-NEXT: ret <4 x float> <float 1.000000e+00, float bitcast (i32 ptrtoint (ptr @shufflevector_constexpr to i32) to float), float 4.000000e+00, float 0.000000e+00>
;
ret <4 x float> shufflevector (<2 x float> <float 1.0, float bitcast (i32 ptrtoint (ptr @shufflevector_constexpr to i32) to float)>, <2 x float> <float 4.0, float 0.0>, <4 x i32> <i32 0, i32 1, i32 2, i32 3>)
@@ -1464,7 +1464,7 @@ define <4 x float> @shufflevector_constexpr() {
define <4 x float> @shufflevector_concat_disjoint(<2 x float> nofpclass(nan) %arg0, <2 x float> nofpclass(inf) %arg1) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define <4 x float> @shufflevector_concat_disjoint
-; CHECK-SAME: (<2 x float> nofpclass(nan) [[ARG0:%.*]], <2 x float> nofpclass(inf) [[ARG1:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (<2 x float> nofpclass(nan) [[ARG0:%.*]], <2 x float> nofpclass(inf) [[ARG1:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <2 x float> [[ARG0]], <2 x float> [[ARG1]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>
; CHECK-NEXT: ret <4 x float> [[SHUFFLE]]
;
@@ -1475,7 +1475,7 @@ define <4 x float> @shufflevector_concat_disjoint(<2 x float> nofpclass(nan) %ar
define <4 x float> @shufflevector_concat_overlap(<2 x float> nofpclass(nan norm psub) %arg0, <2 x float> nofpclass(inf nan sub) %arg1) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(nan psub) <4 x float> @shufflevector_concat_overlap
-; CHECK-SAME: (<2 x float> nofpclass(nan psub norm) [[ARG0:%.*]], <2 x float> nofpclass(nan inf sub) [[ARG1:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (<2 x float> nofpclass(nan psub norm) [[ARG0:%.*]], <2 x float> nofpclass(nan inf sub) [[ARG1:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <2 x float> [[ARG0]], <2 x float> [[ARG1]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>
; CHECK-NEXT: ret <4 x float> [[SHUFFLE]]
;
@@ -1486,7 +1486,7 @@ define <4 x float> @shufflevector_concat_overlap(<2 x float> nofpclass(nan norm
define <4 x float> @shufflevector_unknown_lhs(<2 x float> %arg0, <2 x float> nofpclass(inf) %arg1) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define <4 x float> @shufflevector_unknown_lhs
-; CHECK-SAME: (<2 x float> [[ARG0:%.*]], <2 x float> nofpclass(inf) [[ARG1:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (<2 x float> [[ARG0:%.*]], <2 x float> nofpclass(inf) [[ARG1:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <2 x float> [[ARG0]], <2 x float> [[ARG1]], <4 x i32> <i32 3, i32 2, i32 1, i32 0>
; CHECK-NEXT: ret <4 x float> [[SHUFFLE]]
;
@@ -1497,7 +1497,7 @@ define <4 x float> @shufflevector_unknown_lhs(<2 x float> %arg0, <2 x float> nof
define <4 x float> @shufflevector_unknown_rhs(<2 x float> nofpclass(inf) %arg0, <2 x float> %arg1) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define <4 x float> @shufflevector_unknown_rhs
-; CHECK-SAME: (<2 x float> nofpclass(inf) [[ARG0:%.*]], <2 x float> [[ARG1:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (<2 x float> nofpclass(inf) [[ARG0:%.*]], <2 x float> [[ARG1:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <2 x float> [[ARG0]], <2 x float> [[ARG1]], <4 x i32> <i32 3, i32 2, i32 1, i32 0>
; CHECK-NEXT: ret <4 x float> [[SHUFFLE]]
;
@@ -1508,7 +1508,7 @@ define <4 x float> @shufflevector_unknown_rhs(<2 x float> nofpclass(inf) %arg0,
define <4 x float> @shufflevector_unknown_all(<2 x float> %arg0, <2 x float> %arg1) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define <4 x float> @shufflevector_unknown_all
-; CHECK-SAME: (<2 x float> [[ARG0:%.*]], <2 x float> [[ARG1:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (<2 x float> [[ARG0:%.*]], <2 x float> [[ARG1:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <2 x float> [[ARG0]], <2 x float> [[ARG1]], <4 x i32> <i32 3, i32 2, i32 1, i32 0>
; CHECK-NEXT: ret <4 x float> [[SHUFFLE]]
;
@@ -1519,7 +1519,7 @@ define <4 x float> @shufflevector_unknown_all(<2 x float> %arg0, <2 x float> %ar
define <4 x float> @shufflevector_only_demand_lhs(<2 x float> nofpclass(inf) %arg0, <2 x float> %arg1) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(inf) <4 x float> @shufflevector_only_demand_lhs
-; CHECK-SAME: (<2 x float> nofpclass(inf) [[ARG0:%.*]], <2 x float> [[ARG1:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (<2 x float> nofpclass(inf) [[ARG0:%.*]], <2 x float> [[ARG1:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <2 x float> [[ARG0]], <2 x float> [[ARG1]], <4 x i32> <i32 0, i32 1, i32 1, i32 0>
; CHECK-NEXT: ret <4 x float> [[SHUFFLE]]
;
@@ -1530,7 +1530,7 @@ define <4 x float> @shufflevector_only_demand_lhs(<2 x float> nofpclass(inf) %ar
define <4 x float> @shufflevector_only_demand_rhs(<2 x float> %arg0, <2 x float> nofpclass(inf) %arg1) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(inf) <4 x float> @shufflevector_only_demand_rhs
-; CHECK-SAME: (<2 x float> [[ARG0:%.*]], <2 x float> nofpclass(inf) [[ARG1:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (<2 x float> [[ARG0:%.*]], <2 x float> nofpclass(inf) [[ARG1:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <2 x float> [[ARG0]], <2 x float> [[ARG1]], <4 x i32> <i32 2, i32 3, i32 3, i32 2>
; CHECK-NEXT: ret <4 x float> [[SHUFFLE]]
;
@@ -1541,7 +1541,7 @@ define <4 x float> @shufflevector_only_demand_rhs(<2 x float> %arg0, <2 x float>
define <4 x float> @shufflevector_undef_demanded(<2 x float> %arg0, <2 x float> nofpclass(inf) %arg1) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define <4 x float> @shufflevector_undef_demanded
-; CHECK-SAME: (<2 x float> [[ARG0:%.*]], <2 x float> nofpclass(inf) [[ARG1:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (<2 x float> [[ARG0:%.*]], <2 x float> nofpclass(inf) [[ARG1:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <2 x float> [[ARG0]], <2 x float> [[ARG1]], <4 x i32> poison
; CHECK-NEXT: ret <4 x float> [[SHUFFLE]]
;
@@ -1552,7 +1552,7 @@ define <4 x float> @shufflevector_undef_demanded(<2 x float> %arg0, <2 x float>
define <4 x float> @shufflevector_zeroinit_demanded(<2 x float> %arg0, <2 x float> nofpclass(inf) %arg1) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define <4 x float> @shufflevector_zeroinit_demanded
-; CHECK-SAME: (<2 x float> [[ARG0:%.*]], <2 x float> nofpclass(inf) [[ARG1:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (<2 x float> [[ARG0:%.*]], <2 x float> nofpclass(inf) [[ARG1:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <2 x float> [[ARG0]], <2 x float> [[ARG1]], <4 x i32> zeroinitializer
; CHECK-NEXT: ret <4 x float> [[SHUFFLE]]
;
@@ -1563,7 +1563,7 @@ define <4 x float> @shufflevector_zeroinit_demanded(<2 x float> %arg0, <2 x floa
define float @shufflevector_extractelt0(<2 x float> %arg0, <2 x float> nofpclass(inf) %arg1) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define float @shufflevector_extractelt0
-; CHECK-SAME: (<2 x float> [[ARG0:%.*]], <2 x float> nofpclass(inf) [[ARG1:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (<2 x float> [[ARG0:%.*]], <2 x float> nofpclass(inf) [[ARG1:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <2 x float> [[ARG0]], <2 x float> [[ARG1]], <4 x i32> <i32 1, i32 3, i32 0, i32 1>
; CHECK-NEXT: [[EXTRACT:%.*]] = extractelement <4 x float> [[SHUFFLE]], i32 0
; CHECK-NEXT: ret float [[EXTRACT]]
@@ -1576,7 +1576,7 @@ define float @shufflevector_extractelt0(<2 x float> %arg0, <2 x float> nofpclass
define float @shufflevector_extractelt1(<2 x float> %arg0, <2 x float> nofpclass(inf) %arg1) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(inf) float @shufflevector_extractelt1
-; CHECK-SAME: (<2 x float> [[ARG0:%.*]], <2 x float> nofpclass(inf) [[ARG1:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (<2 x float> [[ARG0:%.*]], <2 x float> nofpclass(inf) [[ARG1:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <2 x float> [[ARG0]], <2 x float> [[ARG1]], <4 x i32> <i32 1, i32 3, i32 0, i32 1>
; CHECK-NEXT: [[EXTRACT:%.*]] = extractelement <4 x float> [[SHUFFLE]], i32 1
; CHECK-NEXT: ret float [[EXTRACT]]
@@ -1589,7 +1589,7 @@ define float @shufflevector_extractelt1(<2 x float> %arg0, <2 x float> nofpclass
define float @shufflevector_extractelt2(<2 x float> %arg0, <2 x float> nofpclass(inf) %arg1) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define float @shufflevector_extractelt2
-; CHECK-SAME: (<2 x float> [[ARG0:%.*]], <2 x float> nofpclass(inf) [[ARG1:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (<2 x float> [[ARG0:%.*]], <2 x float> nofpclass(inf) [[ARG1:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <2 x float> [[ARG0]], <2 x float> [[ARG1]], <4 x i32> <i32 1, i32 3, i32 0, i32 1>
; CHECK-NEXT: [[EXTRACT:%.*]] = extractelement <4 x float> [[SHUFFLE]], i32 2
; CHECK-NEXT: ret float [[EXTRACT]]
@@ -1602,7 +1602,7 @@ define float @shufflevector_extractelt2(<2 x float> %arg0, <2 x float> nofpclass
define float @shufflevector_extractelt3(<2 x float> %arg0, <2 x float> nofpclass(inf) %arg1) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define float @shufflevector_extractelt3
-; CHECK-SAME: (<2 x float> [[ARG0:%.*]], <2 x float> nofpclass(inf) [[ARG1:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (<2 x float> [[ARG0:%.*]], <2 x float> nofpclass(inf) [[ARG1:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[SHUFFLE:%.*]] = shufflevector <2 x float> [[ARG0]], <2 x float> [[ARG1]], <4 x i32> <i32 1, i32 3, i32 0, i32 1>
; CHECK-NEXT: [[EXTRACT:%.*]] = extractelement <4 x float> [[SHUFFLE]], i32 3
; CHECK-NEXT: ret float [[EXTRACT]]
@@ -1615,8 +1615,8 @@ define float @shufflevector_extractelt3(<2 x float> %arg0, <2 x float> nofpclass
define float @constrained_sitofp(i32 %arg) strictfp {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind strictfp willreturn memory(inaccessiblemem: readwrite)
; CHECK-LABEL: define nofpclass(nan nzero sub) float @constrained_sitofp
-; CHECK-SAME: (i32 [[ARG:%.*]]) #[[ATTR5:[0-9]+]] {
-; CHECK-NEXT: [[VAL:%.*]] = call nofpclass(nan nzero sub) float @llvm.experimental.constrained.sitofp.f32.i32(i32 [[ARG]], metadata !"round.dynamic", metadata !"fpexcept.strict") #[[ATTR13]]
+; CHECK-SAME: (i32 [[ARG:%.*]]) #[[ATTR6:[0-9]+]] {
+; CHECK-NEXT: [[VAL:%.*]] = call nofpclass(nan nzero sub) float @llvm.experimental.constrained.sitofp.f32.i32(i32 [[ARG]], metadata !"round.dynamic", metadata !"fpexcept.strict") #[[ATTR14]]
; CHECK-NEXT: ret float [[VAL]]
;
%val = call float @llvm.experimental.constrained.sitofp.f32.i32(i32 %arg, metadata !"round.dynamic", metadata !"fpexcept.strict")
@@ -1626,8 +1626,8 @@ define float @constrained_sitofp(i32 %arg) strictfp {
define float @constrained_uitofp(i32 %arg) strictfp {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind strictfp willreturn memory(inaccessiblemem: readwrite)
; CHECK-LABEL: define nofpclass(nan ninf nzero sub nnorm) float @constrained_uitofp
-; CHECK-SAME: (i32 [[ARG:%.*]]) #[[ATTR5]] {
-; CHECK-NEXT: [[VAL:%.*]] = call nofpclass(nan ninf nzero sub nnorm) float @llvm.experimental.constrained.uitofp.f32.i32(i32 [[ARG]], metadata !"round.dynamic", metadata !"fpexcept.strict") #[[ATTR13]]
+; CHECK-SAME: (i32 [[ARG:%.*]]) #[[ATTR6]] {
+; CHECK-NEXT: [[VAL:%.*]] = call nofpclass(nan ninf nzero sub nnorm) float @llvm.experimental.constrained.uitofp.f32.i32(i32 [[ARG]], metadata !"round.dynamic", metadata !"fpexcept.strict") #[[ATTR14]]
; CHECK-NEXT: ret float [[VAL]]
;
%val = call float @llvm.experimental.constrained.uitofp.f32.i32(i32 %arg, metadata !"round.dynamic", metadata !"fpexcept.strict")
@@ -1637,7 +1637,7 @@ define float @constrained_uitofp(i32 %arg) strictfp {
define float @fadd_p0(float %arg0) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(nzero) float @fadd_p0
-; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[ADD:%.*]] = fadd float [[ARG0]], 0.000000e+00
; CHECK-NEXT: ret float [[ADD]]
;
@@ -1648,7 +1648,7 @@ define float @fadd_p0(float %arg0) {
define float @fadd_n0(float %arg0) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define float @fadd_n0
-; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[ADD:%.*]] = fadd float [[ARG0]], -0.000000e+00
; CHECK-NEXT: ret float [[ADD]]
;
@@ -1659,7 +1659,7 @@ define float @fadd_n0(float %arg0) {
define float @fsub_p0(float %arg0) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define float @fsub_p0
-; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[SUB:%.*]] = fsub float [[ARG0]], 0.000000e+00
; CHECK-NEXT: ret float [[SUB]]
;
@@ -1670,7 +1670,7 @@ define float @fsub_p0(float %arg0) {
define float @fsub_n0(float %arg0) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(nzero) float @fsub_n0
-; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[SUB:%.*]] = fsub float [[ARG0]], -0.000000e+00
; CHECK-NEXT: ret float [[SUB]]
;
@@ -1681,7 +1681,7 @@ define float @fsub_n0(float %arg0) {
define float @fsub_p0_commute(float %arg0) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(nzero) float @fsub_p0_commute
-; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[SUB:%.*]] = fsub float 0.000000e+00, [[ARG0]]
; CHECK-NEXT: ret float [[SUB]]
;
@@ -1692,7 +1692,7 @@ define float @fsub_p0_commute(float %arg0) {
define float @fsub_n0_commute(float %arg0) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define float @fsub_n0_commute
-; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[SUB:%.*]] = fsub float -0.000000e+00, [[ARG0]]
; CHECK-NEXT: ret float [[SUB]]
;
@@ -1703,7 +1703,7 @@ define float @fsub_n0_commute(float %arg0) {
define float @fadd_p0_ftz_daz(float %arg0) #3 {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(nzero) float @fadd_p0_ftz_daz
-; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR6:[0-9]+]] {
+; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR7:[0-9]+]] {
; CHECK-NEXT: [[ADD:%.*]] = fadd float [[ARG0]], 0.000000e+00
; CHECK-NEXT: ret float [[ADD]]
;
@@ -1714,7 +1714,7 @@ define float @fadd_p0_ftz_daz(float %arg0) #3 {
define float @fadd_n0_ftz_daz(float %arg0) #0 {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define float @fadd_n0_ftz_daz
-; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR7:[0-9]+]] {
+; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR8:[0-9]+]] {
; CHECK-NEXT: [[ADD:%.*]] = fadd float [[ARG0]], -0.000000e+00
; CHECK-NEXT: ret float [[ADD]]
;
@@ -1725,7 +1725,7 @@ define float @fadd_n0_ftz_daz(float %arg0) #0 {
define float @fsub_p0_ftz_daz(float %arg0) #0 {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define float @fsub_p0_ftz_daz
-; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR7]] {
+; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR8]] {
; CHECK-NEXT: [[SUB:%.*]] = fsub float [[ARG0]], 0.000000e+00
; CHECK-NEXT: ret float [[SUB]]
;
@@ -1736,7 +1736,7 @@ define float @fsub_p0_ftz_daz(float %arg0) #0 {
define float @fsub_n0_ftz_daz(float %arg0) #0 {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define float @fsub_n0_ftz_daz
-; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR7]] {
+; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR8]] {
; CHECK-NEXT: [[SUB:%.*]] = fsub float [[ARG0]], -0.000000e+00
; CHECK-NEXT: ret float [[SUB]]
;
@@ -1747,7 +1747,7 @@ define float @fsub_n0_ftz_daz(float %arg0) #0 {
define float @fsub_p0_commute_ftz_daz(float %arg0) #0 {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define float @fsub_p0_commute_ftz_daz
-; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR7]] {
+; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR8]] {
; CHECK-NEXT: [[SUB:%.*]] = fsub float 0.000000e+00, [[ARG0]]
; CHECK-NEXT: ret float [[SUB]]
;
@@ -1758,7 +1758,7 @@ define float @fsub_p0_commute_ftz_daz(float %arg0) #0 {
define float @fsub_n0_commute_ftz_daz(float %arg0) #0 {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define float @fsub_n0_commute_ftz_daz
-; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR7]] {
+; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR8]] {
; CHECK-NEXT: [[SUB:%.*]] = fsub float -0.000000e+00, [[ARG0]]
; CHECK-NEXT: ret float [[SUB]]
;
@@ -1769,7 +1769,7 @@ define float @fsub_n0_commute_ftz_daz(float %arg0) #0 {
define float @fadd_p0_ieee_daz(float %arg0) #2 {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(nzero) float @fadd_p0_ieee_daz
-; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR8:[0-9]+]] {
+; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR9:[0-9]+]] {
; CHECK-NEXT: [[ADD:%.*]] = fadd float [[ARG0]], 0.000000e+00
; CHECK-NEXT: ret float [[ADD]]
;
@@ -1780,7 +1780,7 @@ define float @fadd_p0_ieee_daz(float %arg0) #2 {
define float @fadd_p0_dapz_ieee(float %arg0) #4 {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(nzero) float @fadd_p0_dapz_ieee
-; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR9:[0-9]+]] {
+; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR10:[0-9]+]] {
; CHECK-NEXT: [[ADD:%.*]] = fadd float [[ARG0]], 0.000000e+00
; CHECK-NEXT: ret float [[ADD]]
;
@@ -1791,7 +1791,7 @@ define float @fadd_p0_dapz_ieee(float %arg0) #4 {
define float @fadd_n0_ieee_daz(float %arg0) #2 {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define float @fadd_n0_ieee_daz
-; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR8]] {
+; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR9]] {
; CHECK-NEXT: [[ADD:%.*]] = fadd float [[ARG0]], -0.000000e+00
; CHECK-NEXT: ret float [[ADD]]
;
@@ -1802,7 +1802,7 @@ define float @fadd_n0_ieee_daz(float %arg0) #2 {
define float @fsub_p0_ieee_daz(float %arg0) #2 {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define float @fsub_p0_ieee_daz
-; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR8]] {
+; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR9]] {
; CHECK-NEXT: [[SUB:%.*]] = fsub float [[ARG0]], 0.000000e+00
; CHECK-NEXT: ret float [[SUB]]
;
@@ -1813,7 +1813,7 @@ define float @fsub_p0_ieee_daz(float %arg0) #2 {
define float @fsub_n0_ieee_daz(float %arg0) #2 {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(nzero) float @fsub_n0_ieee_daz
-; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR8]] {
+; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR9]] {
; CHECK-NEXT: [[SUB:%.*]] = fsub float [[ARG0]], -0.000000e+00
; CHECK-NEXT: ret float [[SUB]]
;
@@ -1824,7 +1824,7 @@ define float @fsub_n0_ieee_daz(float %arg0) #2 {
define float @fsub_p0_commute_ieee_daz(float %arg0) #2 {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(nzero) float @fsub_p0_commute_ieee_daz
-; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR8]] {
+; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR9]] {
; CHECK-NEXT: [[SUB:%.*]] = fsub float 0.000000e+00, [[ARG0]]
; CHECK-NEXT: ret float [[SUB]]
;
@@ -1835,7 +1835,7 @@ define float @fsub_p0_commute_ieee_daz(float %arg0) #2 {
define float @fsub_n0_commute_ieee_daz(float %arg0) #1 {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define float @fsub_n0_commute_ieee_daz
-; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR10:[0-9]+]] {
+; CHECK-SAME: (float [[ARG0:%.*]]) #[[ATTR11:[0-9]+]] {
; CHECK-NEXT: [[SUB:%.*]] = fsub float -0.000000e+00, [[ARG0]]
; CHECK-NEXT: ret float [[SUB]]
;
@@ -1846,7 +1846,7 @@ define float @fsub_n0_commute_ieee_daz(float %arg0) #1 {
define float @fadd_never_negzero_or_negsub(float nofpclass(nzero nsub) %a, float nofpclass(nzero nsub) %b) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(nzero) float @fadd_never_negzero_or_negsub
-; CHECK-SAME: (float nofpclass(nzero nsub) [[A:%.*]], float nofpclass(nzero nsub) [[B:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (float nofpclass(nzero nsub) [[A:%.*]], float nofpclass(nzero nsub) [[B:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[ADD:%.*]] = fadd float [[A]], [[B]]
; CHECK-NEXT: ret float [[ADD]]
;
@@ -1857,7 +1857,7 @@ define float @fadd_never_negzero_or_negsub(float nofpclass(nzero nsub) %a, float
define float @fadd_never_negzero_or_negsub_daz(float nofpclass(nzero nsub) %a, float nofpclass(nzero nsub) %b) #2 {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(nzero) float @fadd_never_negzero_or_negsub_daz
-; CHECK-SAME: (float nofpclass(nzero nsub) [[A:%.*]], float nofpclass(nzero nsub) [[B:%.*]]) #[[ATTR8]] {
+; CHECK-SAME: (float nofpclass(nzero nsub) [[A:%.*]], float nofpclass(nzero nsub) [[B:%.*]]) #[[ATTR9]] {
; CHECK-NEXT: [[ADD:%.*]] = fadd float [[A]], [[B]]
; CHECK-NEXT: ret float [[ADD]]
;
@@ -1868,7 +1868,7 @@ define float @fadd_never_negzero_or_negsub_daz(float nofpclass(nzero nsub) %a, f
define float @fadd_never_negzero_or_negsub_dapz(float nofpclass(nzero nsub) %a, float nofpclass(nzero nsub) %b) #5 {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(nzero) float @fadd_never_negzero_or_negsub_dapz
-; CHECK-SAME: (float nofpclass(nzero nsub) [[A:%.*]], float nofpclass(nzero nsub) [[B:%.*]]) #[[ATTR11:[0-9]+]] {
+; CHECK-SAME: (float nofpclass(nzero nsub) [[A:%.*]], float nofpclass(nzero nsub) [[B:%.*]]) #[[ATTR12:[0-9]+]] {
; CHECK-NEXT: [[ADD:%.*]] = fadd float [[A]], [[B]]
; CHECK-NEXT: ret float [[ADD]]
;
@@ -1879,7 +1879,7 @@ define float @fadd_never_negzero_or_negsub_dapz(float nofpclass(nzero nsub) %a,
define float @fadd_never_negzero_or_possub(float nofpclass(nzero psub) %a, float nofpclass(nzero psub) %b) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(nzero) float @fadd_never_negzero_or_possub
-; CHECK-SAME: (float nofpclass(nzero psub) [[A:%.*]], float nofpclass(nzero psub) [[B:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (float nofpclass(nzero psub) [[A:%.*]], float nofpclass(nzero psub) [[B:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[ADD:%.*]] = fadd float [[A]], [[B]]
; CHECK-NEXT: ret float [[ADD]]
;
@@ -1890,7 +1890,7 @@ define float @fadd_never_negzero_or_possub(float nofpclass(nzero psub) %a, float
define float @fadd_never_negzero_or_possub_daz(float nofpclass(nzero psub) %a, float nofpclass(nzero psub) %b) #2 {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define float @fadd_never_negzero_or_possub_daz
-; CHECK-SAME: (float nofpclass(nzero psub) [[A:%.*]], float nofpclass(nzero psub) [[B:%.*]]) #[[ATTR8]] {
+; CHECK-SAME: (float nofpclass(nzero psub) [[A:%.*]], float nofpclass(nzero psub) [[B:%.*]]) #[[ATTR9]] {
; CHECK-NEXT: [[ADD:%.*]] = fadd float [[A]], [[B]]
; CHECK-NEXT: ret float [[ADD]]
;
@@ -1901,7 +1901,7 @@ define float @fadd_never_negzero_or_possub_daz(float nofpclass(nzero psub) %a, f
define float @fadd_never_negzero_or_possub_dapz(float nofpclass(nzero psub) %a, float nofpclass(nzero psub) %b) #5 {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(nzero) float @fadd_never_negzero_or_possub_dapz
-; CHECK-SAME: (float nofpclass(nzero psub) [[A:%.*]], float nofpclass(nzero psub) [[B:%.*]]) #[[ATTR11]] {
+; CHECK-SAME: (float nofpclass(nzero psub) [[A:%.*]], float nofpclass(nzero psub) [[B:%.*]]) #[[ATTR12]] {
; CHECK-NEXT: [[ADD:%.*]] = fadd float [[A]], [[B]]
; CHECK-NEXT: ret float [[ADD]]
;
@@ -1912,7 +1912,7 @@ define float @fadd_never_negzero_or_possub_dapz(float nofpclass(nzero psub) %a,
define float @fadd_never_negzero_or_sub_daz(float nofpclass(nzero sub) %a, float nofpclass(nzero sub) %b) #2 {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(nzero) float @fadd_never_negzero_or_sub_daz
-; CHECK-SAME: (float nofpclass(nzero sub) [[A:%.*]], float nofpclass(nzero sub) [[B:%.*]]) #[[ATTR8]] {
+; CHECK-SAME: (float nofpclass(nzero sub) [[A:%.*]], float nofpclass(nzero sub) [[B:%.*]]) #[[ATTR9]] {
; CHECK-NEXT: [[ADD:%.*]] = fadd float [[A]], [[B]]
; CHECK-NEXT: ret float [[ADD]]
;
@@ -1923,7 +1923,7 @@ define float @fadd_never_negzero_or_sub_daz(float nofpclass(nzero sub) %a, float
define float @fadd_never_negzero_or_sub_dapz(float nofpclass(nzero sub) %a, float nofpclass(nzero sub) %b) #5 {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(nzero) float @fadd_never_negzero_or_sub_dapz
-; CHECK-SAME: (float nofpclass(nzero sub) [[A:%.*]], float nofpclass(nzero sub) [[B:%.*]]) #[[ATTR11]] {
+; CHECK-SAME: (float nofpclass(nzero sub) [[A:%.*]], float nofpclass(nzero sub) [[B:%.*]]) #[[ATTR12]] {
; CHECK-NEXT: [[ADD:%.*]] = fadd float [[A]], [[B]]
; CHECK-NEXT: ret float [[ADD]]
;
@@ -1934,7 +1934,7 @@ define float @fadd_never_negzero_or_sub_dapz(float nofpclass(nzero sub) %a, floa
define float @fadd_known_positive_lhs(float nofpclass(ninf nsub nnorm) %arg0, float %arg1) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define float @fadd_known_positive_lhs
-; CHECK-SAME: (float nofpclass(ninf nsub nnorm) [[ARG0:%.*]], float [[ARG1:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (float nofpclass(ninf nsub nnorm) [[ARG0:%.*]], float [[ARG1:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[ADD:%.*]] = fadd float [[ARG0]], [[ARG1]]
; CHECK-NEXT: ret float [[ADD]]
;
@@ -1945,7 +1945,7 @@ define float @fadd_known_positive_lhs(float nofpclass(ninf nsub nnorm) %arg0, fl
define float @fadd_known_positive_rhs(float %arg0, float nofpclass(ninf nsub nnorm) %arg1) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define float @fadd_known_positive_rhs
-; CHECK-SAME: (float [[ARG0:%.*]], float nofpclass(ninf nsub nnorm) [[ARG1:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (float [[ARG0:%.*]], float nofpclass(ninf nsub nnorm) [[ARG1:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[ADD:%.*]] = fadd float [[ARG0]], [[ARG1]]
; CHECK-NEXT: ret float [[ADD]]
;
@@ -1956,7 +1956,7 @@ define float @fadd_known_positive_rhs(float %arg0, float nofpclass(ninf nsub nno
define float @fadd_known_positive(float nofpclass(ninf nsub nnorm) %arg0, float nofpclass(ninf nsub nnorm) %arg1) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(ninf nsub nnorm) float @fadd_known_positive
-; CHECK-SAME: (float nofpclass(ninf nsub nnorm) [[ARG0:%.*]], float nofpclass(ninf nsub nnorm) [[ARG1:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (float nofpclass(ninf nsub nnorm) [[ARG0:%.*]], float nofpclass(ninf nsub nnorm) [[ARG1:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[ADD:%.*]] = fadd float [[ARG0]], [[ARG1]]
; CHECK-NEXT: ret float [[ADD]]
;
@@ -1967,7 +1967,7 @@ define float @fadd_known_positive(float nofpclass(ninf nsub nnorm) %arg0, float
define float @fadd_known_positive_daz(float nofpclass(ninf nsub nnorm) %arg0, float nofpclass(ninf nsub nnorm) %arg1) #0 {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(ninf nsub nnorm) float @fadd_known_positive_daz
-; CHECK-SAME: (float nofpclass(ninf nsub nnorm) [[ARG0:%.*]], float nofpclass(ninf nsub nnorm) [[ARG1:%.*]]) #[[ATTR7]] {
+; CHECK-SAME: (float nofpclass(ninf nsub nnorm) [[ARG0:%.*]], float nofpclass(ninf nsub nnorm) [[ARG1:%.*]]) #[[ATTR8]] {
; CHECK-NEXT: [[ADD:%.*]] = fadd float [[ARG0]], [[ARG1]]
; CHECK-NEXT: ret float [[ADD]]
;
@@ -1978,7 +1978,7 @@ define float @fadd_known_positive_daz(float nofpclass(ninf nsub nnorm) %arg0, fl
define float @fadd_known_positive_nzero_lhs(float nofpclass(ninf nsub nnorm nzero) %arg0, float nofpclass(ninf nsub nnorm) %arg1) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(ninf nzero nsub nnorm) float @fadd_known_positive_nzero_lhs
-; CHECK-SAME: (float nofpclass(ninf nzero nsub nnorm) [[ARG0:%.*]], float nofpclass(ninf nsub nnorm) [[ARG1:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (float nofpclass(ninf nzero nsub nnorm) [[ARG0:%.*]], float nofpclass(ninf nsub nnorm) [[ARG1:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[ADD:%.*]] = fadd float [[ARG0]], [[ARG1]]
; CHECK-NEXT: ret float [[ADD]]
;
@@ -1989,7 +1989,7 @@ define float @fadd_known_positive_nzero_lhs(float nofpclass(ninf nsub nnorm nzer
define float @fadd_known_positive_nzero_rhs(float nofpclass(ninf nsub nnorm) %arg0, float nofpclass(ninf nsub nnorm nzero) %arg1) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(ninf nzero nsub nnorm) float @fadd_known_positive_nzero_rhs
-; CHECK-SAME: (float nofpclass(ninf nsub nnorm) [[ARG0:%.*]], float nofpclass(ninf nzero nsub nnorm) [[ARG1:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (float nofpclass(ninf nsub nnorm) [[ARG0:%.*]], float nofpclass(ninf nzero nsub nnorm) [[ARG1:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[ADD:%.*]] = fadd float [[ARG0]], [[ARG1]]
; CHECK-NEXT: ret float [[ADD]]
;
@@ -2000,7 +2000,7 @@ define float @fadd_known_positive_nzero_rhs(float nofpclass(ninf nsub nnorm) %ar
define float @fadd_known_positive_nzero(float nofpclass(ninf nsub nnorm nzero) %arg0, float nofpclass(ninf nsub nnorm nzero) %arg1) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(ninf nzero nsub nnorm) float @fadd_known_positive_nzero
-; CHECK-SAME: (float nofpclass(ninf nzero nsub nnorm) [[ARG0:%.*]], float nofpclass(ninf nzero nsub nnorm) [[ARG1:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (float nofpclass(ninf nzero nsub nnorm) [[ARG0:%.*]], float nofpclass(ninf nzero nsub nnorm) [[ARG1:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[ADD:%.*]] = fadd float [[ARG0]], [[ARG1]]
; CHECK-NEXT: ret float [[ADD]]
;
@@ -2011,7 +2011,7 @@ define float @fadd_known_positive_nzero(float nofpclass(ninf nsub nnorm nzero) %
define float @fadd_known_positive_nzero_ftz_daz(float nofpclass(ninf nsub nnorm nzero) %arg0, float nofpclass(ninf nsub nnorm nzero) %arg1) #0 {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(ninf nsub nnorm) float @fadd_known_positive_nzero_ftz_daz
-; CHECK-SAME: (float nofpclass(ninf nzero nsub nnorm) [[ARG0:%.*]], float nofpclass(ninf nzero nsub nnorm) [[ARG1:%.*]]) #[[ATTR7]] {
+; CHECK-SAME: (float nofpclass(ninf nzero nsub nnorm) [[ARG0:%.*]], float nofpclass(ninf nzero nsub nnorm) [[ARG1:%.*]]) #[[ATTR8]] {
; CHECK-NEXT: [[ADD:%.*]] = fadd float [[ARG0]], [[ARG1]]
; CHECK-NEXT: ret float [[ADD]]
;
@@ -2022,7 +2022,7 @@ define float @fadd_known_positive_nzero_ftz_daz(float nofpclass(ninf nsub nnorm
define float @fadd_known_positive_nzero_ftz(float nofpclass(ninf nsub nnorm nzero) %arg0, float nofpclass(ninf nsub nnorm nzero) %arg1) #1 {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(ninf nsub nnorm) float @fadd_known_positive_nzero_ftz
-; CHECK-SAME: (float nofpclass(ninf nzero nsub nnorm) [[ARG0:%.*]], float nofpclass(ninf nzero nsub nnorm) [[ARG1:%.*]]) #[[ATTR10]] {
+; CHECK-SAME: (float nofpclass(ninf nzero nsub nnorm) [[ARG0:%.*]], float nofpclass(ninf nzero nsub nnorm) [[ARG1:%.*]]) #[[ATTR11]] {
; CHECK-NEXT: [[ADD:%.*]] = fadd float [[ARG0]], [[ARG1]]
; CHECK-NEXT: ret float [[ADD]]
;
@@ -2033,7 +2033,7 @@ define float @fadd_known_positive_nzero_ftz(float nofpclass(ninf nsub nnorm nzer
define float @fadd_known_positive_nzero_daz(float nofpclass(ninf nsub nnorm nzero) %arg0, float nofpclass(ninf nsub nnorm nzero) %arg1) #2 {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(ninf nzero nsub nnorm) float @fadd_known_positive_nzero_daz
-; CHECK-SAME: (float nofpclass(ninf nzero nsub nnorm) [[ARG0:%.*]], float nofpclass(ninf nzero nsub nnorm) [[ARG1:%.*]]) #[[ATTR8]] {
+; CHECK-SAME: (float nofpclass(ninf nzero nsub nnorm) [[ARG0:%.*]], float nofpclass(ninf nzero nsub nnorm) [[ARG1:%.*]]) #[[ATTR9]] {
; CHECK-NEXT: [[ADD:%.*]] = fadd float [[ARG0]], [[ARG1]]
; CHECK-NEXT: ret float [[ADD]]
;
@@ -2044,7 +2044,7 @@ define float @fadd_known_positive_nzero_daz(float nofpclass(ninf nsub nnorm nzer
define float @fadd_known_positive_normal(float nofpclass(ninf nnorm nzero) %arg0, float nofpclass(ninf nnorm nzero) %arg1) {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(nzero) float @fadd_known_positive_normal
-; CHECK-SAME: (float nofpclass(ninf nzero nnorm) [[ARG0:%.*]], float nofpclass(ninf nzero nnorm) [[ARG1:%.*]]) #[[ATTR2]] {
+; CHECK-SAME: (float nofpclass(ninf nzero nnorm) [[ARG0:%.*]], float nofpclass(ninf nzero nnorm) [[ARG1:%.*]]) #[[ATTR3]] {
; CHECK-NEXT: [[ADD:%.*]] = fadd float [[ARG0]], [[ARG1]]
; CHECK-NEXT: ret float [[ADD]]
;
@@ -2055,7 +2055,7 @@ define float @fadd_known_positive_normal(float nofpclass(ninf nnorm nzero) %arg0
define float @fadd_known_positive_normal_daz(float nofpclass(ninf nnorm nzero) %arg0, float nofpclass(ninf nnorm nzero) %arg1) #0 {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define float @fadd_known_positive_normal_daz
-; CHECK-SAME: (float nofpclass(ninf nzero nnorm) [[ARG0:%.*]], float nofpclass(ninf nzero nnorm) [[ARG1:%.*]]) #[[ATTR7]] {
+; CHECK-SAME: (float nofpclass(ninf nzero nnorm) [[ARG0:%.*]], float nofpclass(ninf nzero nnorm) [[ARG1:%.*]]) #[[ATTR8]] {
; CHECK-NEXT: [[ADD:%.*]] = fadd float [[ARG0]], [[ARG1]]
; CHECK-NEXT: ret float [[ADD]]
;
@@ -2066,7 +2066,7 @@ define float @fadd_known_positive_normal_daz(float nofpclass(ninf nnorm nzero) %
define float @fadd_known_positive_normal_except0_daz(float nofpclass(ninf nnorm) %arg0, float nofpclass(ninf nnorm) %arg1) #0 {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define float @fadd_known_positive_normal_except0_daz
-; CHECK-SAME: (float nofpclass(ninf nnorm) [[ARG0:%.*]], float nofpclass(ninf nnorm) [[ARG1:%.*]]) #[[ATTR7]] {
+; CHECK-SAME: (float nofpclass(ninf nnorm) [[ARG0:%.*]], float nofpclass(ninf nnorm) [[ARG1:%.*]]) #[[ATTR8]] {
; CHECK-NEXT: [[ADD:%.*]] = fadd float [[ARG0]], [[ARG1]]
; CHECK-NEXT: ret float [[ADD]]
;
@@ -2077,7 +2077,7 @@ define float @fadd_known_positive_normal_except0_daz(float nofpclass(ninf nnorm)
define float @fadd_known_positive_normal_dapz(float nofpclass(ninf nnorm nzero) %arg0, float nofpclass(ninf nnorm nzero) %arg1) #3 {
; CHECK: Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none)
; CHECK-LABEL: define nofpclass(nzero) float @fadd_known_positive_normal_dapz
-; CHECK-SAME: (float nofpclass(ninf nzero nnorm) [[ARG0:%.*]], float nofpclass(ninf nzero nnorm) [[ARG1:%.*]]) #[[ATTR6]] {
+; CHECK-SAME: (float nofpclass(ninf nzero nnorm) [[ARG0:%.*]], float nofpclass(ninf nzero nnorm) [[ARG1:%.*]]) #[[ATTR7]] {
; CHECK-NEXT: [[ADD:%.*]] = fadd float [[ARG0]], [[ARG1]]
; CHECK-NEXT: ret float [[ADD]]
;
diff --git a/llvm/test/Transforms/Attributor/nonnull.ll b/llvm/test/Transforms/Attributor/nonnull.ll
index 93c1caf80e923a..fe74147e08c39e 100644
--- a/llvm/test/Transforms/Attributor/nonnull.ll
+++ b/llvm/test/Transforms/Attributor/nonnull.ll
@@ -397,20 +397,20 @@ define internal ptr @f1(ptr %arg) {
; TUNIT-NEXT: [[TMP:%.*]] = icmp eq ptr [[ARG]], null
; TUNIT-NEXT: br i1 [[TMP]], label [[BB9:%.*]], label [[BB1:%.*]]
; TUNIT: bb1:
-; TUNIT-NEXT: [[TMP2:%.*]] = load i32, ptr [[ARG]], align 4
-; TUNIT-NEXT: [[TMP3:%.*]] = icmp eq i32 [[TMP2]], 0
-; TUNIT-NEXT: br i1 [[TMP3]], label [[BB6:%.*]], label [[BB4:%.*]]
+; TUNIT-NEXT: [[TRUETMP2:%.*]] = load i32, ptr [[ARG]], align 4
+; TUNIT-NEXT: [[TRUETMP3:%.*]] = icmp eq i32 [[TRUETMP2]], 0
+; TUNIT-NEXT: br i1 [[TRUETMP3]], label [[BB6:%.*]], label [[BB4:%.*]]
; TUNIT: bb4:
-; TUNIT-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, ptr [[ARG]], i64 1
-; TUNIT-NEXT: [[TMP5B:%.*]] = tail call ptr @f3(ptr nofree nonnull readonly [[TMP5]]) #[[ATTR16:[0-9]+]]
+; TUNIT-NEXT: [[TRUETMP5:%.*]] = getelementptr inbounds i32, ptr [[ARG]], i64 1
+; TUNIT-NEXT: [[TMP5B:%.*]] = tail call ptr @f3(ptr nofree nonnull readonly [[TRUETMP5]]) #[[ATTR16:[0-9]+]]
; TUNIT-NEXT: [[TMP5C:%.*]] = getelementptr inbounds i32, ptr [[TMP5B]], i64 -1
; TUNIT-NEXT: br label [[BB9]]
; TUNIT: bb6:
-; TUNIT-NEXT: [[TMP7:%.*]] = tail call ptr @f2(ptr nofree nonnull readonly align 4 dereferenceable(4) [[ARG]]) #[[ATTR16]]
-; TUNIT-NEXT: ret ptr [[TMP7]]
+; TUNIT-NEXT: [[TRUETMP7:%.*]] = tail call ptr @f2(ptr nofree nonnull readonly align 4 dereferenceable(4) [[ARG]]) #[[ATTR16]]
+; TUNIT-NEXT: ret ptr [[TRUETMP7]]
; TUNIT: bb9:
-; TUNIT-NEXT: [[TMP10:%.*]] = phi ptr [ [[TMP5C]], [[BB4]] ], [ inttoptr (i64 4 to ptr), [[BB:%.*]] ]
-; TUNIT-NEXT: ret ptr [[TMP10]]
+; TUNIT-NEXT: [[TRUETMP10:%.*]] = phi ptr [ [[TMP5C]], [[BB4]] ], [ inttoptr (i64 4 to ptr), [[BB:%.*]] ]
+; TUNIT-NEXT: ret ptr [[TRUETMP10]]
;
; CGSCC: Function Attrs: nofree nosync nounwind memory(argmem: read)
; CGSCC-LABEL: define {{[^@]+}}@f1
@@ -419,20 +419,20 @@ define internal ptr @f1(ptr %arg) {
; CGSCC-NEXT: [[TMP:%.*]] = icmp eq ptr [[ARG]], null
; CGSCC-NEXT: br i1 [[TMP]], label [[BB9:%.*]], label [[BB1:%.*]]
; CGSCC: bb1:
-; CGSCC-NEXT: [[TMP2:%.*]] = load i32, ptr [[ARG]], align 4
-; CGSCC-NEXT: [[TMP3:%.*]] = icmp eq i32 [[TMP2]], 0
-; CGSCC-NEXT: br i1 [[TMP3]], label [[BB6:%.*]], label [[BB4:%.*]]
+; CGSCC-NEXT: [[TRUETMP2:%.*]] = load i32, ptr [[ARG]], align 4
+; CGSCC-NEXT: [[TRUETMP3:%.*]] = icmp eq i32 [[TRUETMP2]], 0
+; CGSCC-NEXT: br i1 [[TRUETMP3]], label [[BB6:%.*]], label [[BB4:%.*]]
; CGSCC: bb4:
-; CGSCC-NEXT: [[TMP5:%.*]] = getelementptr inbounds i32, ptr [[ARG]], i64 1
-; CGSCC-NEXT: [[TMP5B:%.*]] = tail call ptr @f3(ptr nofree nonnull readonly [[TMP5]]) #[[ATTR16:[0-9]+]]
+; CGSCC-NEXT: [[TRUETMP5:%.*]] = getelementptr inbounds i32, ptr [[ARG]], i64 1
+; CGSCC-NEXT: [[TMP5B:%.*]] = tail call ptr @f3(ptr nofree nonnull readonly [[TRUETMP5]]) #[[ATTR16:[0-9]+]]
; CGSCC-NEXT: [[TMP5C:%.*]] = getelementptr inbounds i32, ptr [[TMP5B]], i64 -1
; CGSCC-NEXT: br label [[BB9]]
; CGSCC: bb6:
-; CGSCC-NEXT: [[TMP7:%.*]] = tail call ptr @f2(ptr nofree nonnull readonly align 4 dereferenceable(4) [[ARG]]) #[[ATTR16]]
-; CGSCC-NEXT: ret ptr [[TMP7]]
+; CGSCC-NEXT: [[TRUETMP7:%.*]] = tail call ptr @f2(ptr nofree nonnull readonly align 4 dereferenceable(4) [[ARG]]) #[[ATTR16]]
+; CGSCC-NEXT: ret ptr [[TRUETMP7]]
; CGSCC: bb9:
-; CGSCC-NEXT: [[TMP10:%.*]] = phi ptr [ [[TMP5C]], [[BB4]] ], [ inttoptr (i64 4 to ptr), [[BB:%.*]] ]
-; CGSCC-NEXT: ret ptr [[TMP10]]
+; CGSCC-NEXT: [[TRUETMP10:%.*]] = phi ptr [ [[TMP5C]], [[BB4]] ], [ inttoptr (i64 4 to ptr), [[BB:%.*]] ]
+; CGSCC-NEXT: ret ptr [[TRUETMP10]]
;
bb:
@@ -1100,33 +1100,33 @@ define i32 @nonnull_exec_ctx_1(ptr %a, i32 %b) {
; TUNIT-LABEL: define {{[^@]+}}@nonnull_exec_ctx_1
; TUNIT-SAME: (ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR8]] {
; TUNIT-NEXT: en:
-; TUNIT-NEXT: [[TMP3:%.*]] = icmp eq i32 [[B]], 0
-; TUNIT-NEXT: br i1 [[TMP3]], label [[EX:%.*]], label [[HD:%.*]]
+; TUNIT-NEXT: [[TRUETMP3:%.*]] = icmp eq i32 [[B]], 0
+; TUNIT-NEXT: br i1 [[TRUETMP3]], label [[EX:%.*]], label [[HD:%.*]]
; TUNIT: ex:
-; TUNIT-NEXT: [[TMP5:%.*]] = tail call i32 @g(ptr nonnull [[A]]) #[[ATTR7]]
-; TUNIT-NEXT: ret i32 [[TMP5]]
+; TUNIT-NEXT: [[TRUETMP5:%.*]] = tail call i32 @g(ptr nonnull [[A]]) #[[ATTR7]]
+; TUNIT-NEXT: ret i32 [[TRUETMP5]]
; TUNIT: hd:
-; TUNIT-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8:%.*]], [[HD]] ], [ 0, [[EN:%.*]] ]
+; TUNIT-NEXT: [[TRUETMP7:%.*]] = phi i32 [ [[TRUETMP8:%.*]], [[HD]] ], [ 0, [[EN:%.*]] ]
; TUNIT-NEXT: tail call void @h(ptr [[A]]) #[[ATTR7]]
-; TUNIT-NEXT: [[TMP8]] = add nuw i32 [[TMP7]], 1
-; TUNIT-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], [[B]]
-; TUNIT-NEXT: br i1 [[TMP9]], label [[EX]], label [[HD]]
+; TUNIT-NEXT: [[TRUETMP8]] = add nuw i32 [[TRUETMP7]], 1
+; TUNIT-NEXT: [[TRUETMP9:%.*]] = icmp eq i32 [[TRUETMP8]], [[B]]
+; TUNIT-NEXT: br i1 [[TRUETMP9]], label [[EX]], label [[HD]]
;
; CGSCC: Function Attrs: mustprogress nounwind willreturn
; CGSCC-LABEL: define {{[^@]+}}@nonnull_exec_ctx_1
; CGSCC-SAME: (ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR7]] {
; CGSCC-NEXT: en:
-; CGSCC-NEXT: [[TMP3:%.*]] = icmp eq i32 [[B]], 0
-; CGSCC-NEXT: br i1 [[TMP3]], label [[EX:%.*]], label [[HD:%.*]]
+; CGSCC-NEXT: [[TRUETMP3:%.*]] = icmp eq i32 [[B]], 0
+; CGSCC-NEXT: br i1 [[TRUETMP3]], label [[EX:%.*]], label [[HD:%.*]]
; CGSCC: ex:
-; CGSCC-NEXT: [[TMP5:%.*]] = tail call i32 @g(ptr nonnull [[A]]) #[[ATTR6]]
-; CGSCC-NEXT: ret i32 [[TMP5]]
+; CGSCC-NEXT: [[TRUETMP5:%.*]] = tail call i32 @g(ptr nonnull [[A]]) #[[ATTR6]]
+; CGSCC-NEXT: ret i32 [[TRUETMP5]]
; CGSCC: hd:
-; CGSCC-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8:%.*]], [[HD]] ], [ 0, [[EN:%.*]] ]
+; CGSCC-NEXT: [[TRUETMP7:%.*]] = phi i32 [ [[TRUETMP8:%.*]], [[HD]] ], [ 0, [[EN:%.*]] ]
; CGSCC-NEXT: tail call void @h(ptr [[A]]) #[[ATTR6]]
-; CGSCC-NEXT: [[TMP8]] = add nuw i32 [[TMP7]], 1
-; CGSCC-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], [[B]]
-; CGSCC-NEXT: br i1 [[TMP9]], label [[EX]], label [[HD]]
+; CGSCC-NEXT: [[TRUETMP8]] = add nuw i32 [[TRUETMP7]], 1
+; CGSCC-NEXT: [[TRUETMP9:%.*]] = icmp eq i32 [[TRUETMP8]], [[B]]
+; CGSCC-NEXT: br i1 [[TRUETMP9]], label [[EX]], label [[HD]]
;
en:
%tmp3 = icmp eq i32 %b, 0
@@ -1150,37 +1150,37 @@ define i32 @nonnull_exec_ctx_1b(ptr %a, i32 %b) {
; TUNIT-LABEL: define {{[^@]+}}@nonnull_exec_ctx_1b
; TUNIT-SAME: (ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR8]] {
; TUNIT-NEXT: en:
-; TUNIT-NEXT: [[TMP3:%.*]] = icmp eq i32 [[B]], 0
-; TUNIT-NEXT: br i1 [[TMP3]], label [[EX:%.*]], label [[HD:%.*]]
+; TUNIT-NEXT: [[TRUETMP3:%.*]] = icmp eq i32 [[B]], 0
+; TUNIT-NEXT: br i1 [[TRUETMP3]], label [[EX:%.*]], label [[HD:%.*]]
; TUNIT: ex:
-; TUNIT-NEXT: [[TMP5:%.*]] = tail call i32 @g(ptr nonnull [[A]]) #[[ATTR7]]
-; TUNIT-NEXT: ret i32 [[TMP5]]
+; TUNIT-NEXT: [[TRUETMP5:%.*]] = tail call i32 @g(ptr nonnull [[A]]) #[[ATTR7]]
+; TUNIT-NEXT: ret i32 [[TRUETMP5]]
; TUNIT: hd:
-; TUNIT-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8:%.*]], [[HD2:%.*]] ], [ 0, [[EN:%.*]] ]
+; TUNIT-NEXT: [[TRUETMP7:%.*]] = phi i32 [ [[TRUETMP8:%.*]], [[HD2:%.*]] ], [ 0, [[EN:%.*]] ]
; TUNIT-NEXT: tail call void @h(ptr [[A]]) #[[ATTR7]]
; TUNIT-NEXT: br label [[HD2]]
; TUNIT: hd2:
-; TUNIT-NEXT: [[TMP8]] = add nuw i32 [[TMP7]], 1
-; TUNIT-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], [[B]]
-; TUNIT-NEXT: br i1 [[TMP9]], label [[EX]], label [[HD]]
+; TUNIT-NEXT: [[TRUETMP8]] = add nuw i32 [[TRUETMP7]], 1
+; TUNIT-NEXT: [[TRUETMP9:%.*]] = icmp eq i32 [[TRUETMP8]], [[B]]
+; TUNIT-NEXT: br i1 [[TRUETMP9]], label [[EX]], label [[HD]]
;
; CGSCC: Function Attrs: mustprogress nounwind willreturn
; CGSCC-LABEL: define {{[^@]+}}@nonnull_exec_ctx_1b
; CGSCC-SAME: (ptr [[A:%.*]], i32 [[B:%.*]]) #[[ATTR7]] {
; CGSCC-NEXT: en:
-; CGSCC-NEXT: [[TMP3:%.*]] = icmp eq i32 [[B]], 0
-; CGSCC-NEXT: br i1 [[TMP3]], label [[EX:%.*]], label [[HD:%.*]]
+; CGSCC-NEXT: [[TRUETMP3:%.*]] = icmp eq i32 [[B]], 0
+; CGSCC-NEXT: br i1 [[TRUETMP3]], label [[EX:%.*]], label [[HD:%.*]]
; CGSCC: ex:
-; CGSCC-NEXT: [[TMP5:%.*]] = tail call i32 @g(ptr nonnull [[A]]) #[[ATTR6]]
-; CGSCC-NEXT: ret i32 [[TMP5]]
+; CGSCC-NEXT: [[TRUETMP5:%.*]] = tail call i32 @g(ptr nonnull [[A]]) #[[ATTR6]]
+; CGSCC-NEXT: ret i32 [[TRUETMP5]]
; CGSCC: hd:
-; CGSCC-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8:%.*]], [[HD2:%.*]] ], [ 0, [[EN:%.*]] ]
+; CGSCC-NEXT: [[TRUETMP7:%.*]] = phi i32 [ [[TRUETMP8:%.*]], [[HD2:%.*]] ], [ 0, [[EN:%.*]] ]
; CGSCC-NEXT: tail call void @h(ptr [[A]]) #[[ATTR6]]
; CGSCC-NEXT: br label [[HD2]]
; CGSCC: hd2:
-; CGSCC-NEXT: [[TMP8]] = add nuw i32 [[TMP7]], 1
-; CGSCC-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], [[B]]
-; CGSCC-NEXT: br i1 [[TMP9]], label [[EX]], label [[HD]]
+; CGSCC-NEXT: [[TRUETMP8]] = add nuw i32 [[TRUETMP7]], 1
+; CGSCC-NEXT: [[TRUETMP9:%.*]] = icmp eq i32 [[TRUETMP8]], [[B]]
+; CGSCC-NEXT: br i1 [[TRUETMP9]], label [[EX]], label [[HD]]
;
en:
%tmp3 = icmp eq i32 %b, 0
@@ -1207,33 +1207,33 @@ define i32 @nonnull_exec_ctx_2(ptr %a, i32 %b) willreturn nounwind {
; TUNIT-LABEL: define {{[^@]+}}@nonnull_exec_ctx_2
; TUNIT-SAME: (ptr nonnull [[A:%.*]], i32 [[B:%.*]]) #[[ATTR8]] {
; TUNIT-NEXT: en:
-; TUNIT-NEXT: [[TMP3:%.*]] = icmp eq i32 [[B]], 0
-; TUNIT-NEXT: br i1 [[TMP3]], label [[EX:%.*]], label [[HD:%.*]]
+; TUNIT-NEXT: [[TRUETMP3:%.*]] = icmp eq i32 [[B]], 0
+; TUNIT-NEXT: br i1 [[TRUETMP3]], label [[EX:%.*]], label [[HD:%.*]]
; TUNIT: ex:
-; TUNIT-NEXT: [[TMP5:%.*]] = tail call i32 @g(ptr nonnull [[A]]) #[[ATTR5]]
-; TUNIT-NEXT: ret i32 [[TMP5]]
+; TUNIT-NEXT: [[TRUETMP5:%.*]] = tail call i32 @g(ptr nonnull [[A]]) #[[ATTR5]]
+; TUNIT-NEXT: ret i32 [[TRUETMP5]]
; TUNIT: hd:
-; TUNIT-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8:%.*]], [[HD]] ], [ 0, [[EN:%.*]] ]
+; TUNIT-NEXT: [[TRUETMP7:%.*]] = phi i32 [ [[TRUETMP8:%.*]], [[HD]] ], [ 0, [[EN:%.*]] ]
; TUNIT-NEXT: tail call void @h(ptr nonnull [[A]]) #[[ATTR5]]
-; TUNIT-NEXT: [[TMP8]] = add nuw i32 [[TMP7]], 1
-; TUNIT-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], [[B]]
-; TUNIT-NEXT: br i1 [[TMP9]], label [[EX]], label [[HD]]
+; TUNIT-NEXT: [[TRUETMP8]] = add nuw i32 [[TRUETMP7]], 1
+; TUNIT-NEXT: [[TRUETMP9:%.*]] = icmp eq i32 [[TRUETMP8]], [[B]]
+; TUNIT-NEXT: br i1 [[TRUETMP9]], label [[EX]], label [[HD]]
;
; CGSCC: Function Attrs: mustprogress nounwind willreturn
; CGSCC-LABEL: define {{[^@]+}}@nonnull_exec_ctx_2
; CGSCC-SAME: (ptr nonnull [[A:%.*]], i32 [[B:%.*]]) #[[ATTR7]] {
; CGSCC-NEXT: en:
-; CGSCC-NEXT: [[TMP3:%.*]] = icmp eq i32 [[B]], 0
-; CGSCC-NEXT: br i1 [[TMP3]], label [[EX:%.*]], label [[HD:%.*]]
+; CGSCC-NEXT: [[TRUETMP3:%.*]] = icmp eq i32 [[B]], 0
+; CGSCC-NEXT: br i1 [[TRUETMP3]], label [[EX:%.*]], label [[HD:%.*]]
; CGSCC: ex:
-; CGSCC-NEXT: [[TMP5:%.*]] = tail call i32 @g(ptr nonnull [[A]]) #[[ATTR4]]
-; CGSCC-NEXT: ret i32 [[TMP5]]
+; CGSCC-NEXT: [[TRUETMP5:%.*]] = tail call i32 @g(ptr nonnull [[A]]) #[[ATTR4]]
+; CGSCC-NEXT: ret i32 [[TRUETMP5]]
; CGSCC: hd:
-; CGSCC-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8:%.*]], [[HD]] ], [ 0, [[EN:%.*]] ]
+; CGSCC-NEXT: [[TRUETMP7:%.*]] = phi i32 [ [[TRUETMP8:%.*]], [[HD]] ], [ 0, [[EN:%.*]] ]
; CGSCC-NEXT: tail call void @h(ptr nonnull [[A]]) #[[ATTR4]]
-; CGSCC-NEXT: [[TMP8]] = add nuw i32 [[TMP7]], 1
-; CGSCC-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], [[B]]
-; CGSCC-NEXT: br i1 [[TMP9]], label [[EX]], label [[HD]]
+; CGSCC-NEXT: [[TRUETMP8]] = add nuw i32 [[TRUETMP7]], 1
+; CGSCC-NEXT: [[TRUETMP9:%.*]] = icmp eq i32 [[TRUETMP8]], [[B]]
+; CGSCC-NEXT: br i1 [[TRUETMP9]], label [[EX]], label [[HD]]
;
en:
%tmp3 = icmp eq i32 %b, 0
@@ -1257,37 +1257,37 @@ define i32 @nonnull_exec_ctx_2b(ptr %a, i32 %b) willreturn nounwind {
; TUNIT-LABEL: define {{[^@]+}}@nonnull_exec_ctx_2b
; TUNIT-SAME: (ptr nonnull [[A:%.*]], i32 [[B:%.*]]) #[[ATTR8]] {
; TUNIT-NEXT: en:
-; TUNIT-NEXT: [[TMP3:%.*]] = icmp eq i32 [[B]], 0
-; TUNIT-NEXT: br i1 [[TMP3]], label [[EX:%.*]], label [[HD:%.*]]
+; TUNIT-NEXT: [[TRUETMP3:%.*]] = icmp eq i32 [[B]], 0
+; TUNIT-NEXT: br i1 [[TRUETMP3]], label [[EX:%.*]], label [[HD:%.*]]
; TUNIT: ex:
-; TUNIT-NEXT: [[TMP5:%.*]] = tail call i32 @g(ptr nonnull [[A]]) #[[ATTR5]]
-; TUNIT-NEXT: ret i32 [[TMP5]]
+; TUNIT-NEXT: [[TRUETMP5:%.*]] = tail call i32 @g(ptr nonnull [[A]]) #[[ATTR5]]
+; TUNIT-NEXT: ret i32 [[TRUETMP5]]
; TUNIT: hd:
-; TUNIT-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8:%.*]], [[HD2:%.*]] ], [ 0, [[EN:%.*]] ]
+; TUNIT-NEXT: [[TRUETMP7:%.*]] = phi i32 [ [[TRUETMP8:%.*]], [[HD2:%.*]] ], [ 0, [[EN:%.*]] ]
; TUNIT-NEXT: tail call void @h(ptr nonnull [[A]]) #[[ATTR5]]
; TUNIT-NEXT: br label [[HD2]]
; TUNIT: hd2:
-; TUNIT-NEXT: [[TMP8]] = add nuw i32 [[TMP7]], 1
-; TUNIT-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], [[B]]
-; TUNIT-NEXT: br i1 [[TMP9]], label [[EX]], label [[HD]]
+; TUNIT-NEXT: [[TRUETMP8]] = add nuw i32 [[TRUETMP7]], 1
+; TUNIT-NEXT: [[TRUETMP9:%.*]] = icmp eq i32 [[TRUETMP8]], [[B]]
+; TUNIT-NEXT: br i1 [[TRUETMP9]], label [[EX]], label [[HD]]
;
; CGSCC: Function Attrs: mustprogress nounwind willreturn
; CGSCC-LABEL: define {{[^@]+}}@nonnull_exec_ctx_2b
; CGSCC-SAME: (ptr nonnull [[A:%.*]], i32 [[B:%.*]]) #[[ATTR7]] {
; CGSCC-NEXT: en:
-; CGSCC-NEXT: [[TMP3:%.*]] = icmp eq i32 [[B]], 0
-; CGSCC-NEXT: br i1 [[TMP3]], label [[EX:%.*]], label [[HD:%.*]]
+; CGSCC-NEXT: [[TRUETMP3:%.*]] = icmp eq i32 [[B]], 0
+; CGSCC-NEXT: br i1 [[TRUETMP3]], label [[EX:%.*]], label [[HD:%.*]]
; CGSCC: ex:
-; CGSCC-NEXT: [[TMP5:%.*]] = tail call i32 @g(ptr nonnull [[A]]) #[[ATTR4]]
-; CGSCC-NEXT: ret i32 [[TMP5]]
+; CGSCC-NEXT: [[TRUETMP5:%.*]] = tail call i32 @g(ptr nonnull [[A]]) #[[ATTR4]]
+; CGSCC-NEXT: ret i32 [[TRUETMP5]]
; CGSCC: hd:
-; CGSCC-NEXT: [[TMP7:%.*]] = phi i32 [ [[TMP8:%.*]], [[HD2:%.*]] ], [ 0, [[EN:%.*]] ]
+; CGSCC-NEXT: [[TRUETMP7:%.*]] = phi i32 [ [[TRUETMP8:%.*]], [[HD2:%.*]] ], [ 0, [[EN:%.*]] ]
; CGSCC-NEXT: tail call void @h(ptr nonnull [[A]]) #[[ATTR4]]
; CGSCC-NEXT: br label [[HD2]]
; CGSCC: hd2:
-; CGSCC-NEXT: [[TMP8]] = add nuw i32 [[TMP7]], 1
-; CGSCC-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], [[B]]
-; CGSCC-NEXT: br i1 [[TMP9]], label [[EX]], label [[HD]]
+; CGSCC-NEXT: [[TRUETMP8]] = add nuw i32 [[TRUETMP7]], 1
+; CGSCC-NEXT: [[TRUETMP9:%.*]] = icmp eq i32 [[TRUETMP8]], [[B]]
+; CGSCC-NEXT: br i1 [[TRUETMP9]], label [[EX]], label [[HD]]
;
en:
%tmp3 = icmp eq i32 %b, 0
diff --git a/llvm/test/Transforms/Attributor/range.ll b/llvm/test/Transforms/Attributor/range.ll
index ff383df0455296..40012cafc8de30 100644
--- a/llvm/test/Transforms/Attributor/range.ll
+++ b/llvm/test/Transforms/Attributor/range.ll
@@ -730,18 +730,18 @@ define dso_local zeroext i1 @phi(i32 %arg) {
; TUNIT-NEXT: br label [[BB3]]
; TUNIT: bb3:
; TUNIT-NEXT: [[DOT02:%.*]] = phi i32 [ 1, [[BB1]] ], [ 2, [[BB2]] ]
-; TUNIT-NEXT: [[TMP4:%.*]] = icmp sgt i32 [[ARG]], 10
-; TUNIT-NEXT: br i1 [[TMP4]], label [[BB5:%.*]], label [[BB7:%.*]]
+; TUNIT-NEXT: [[TRUETMP4:%.*]] = icmp sgt i32 [[ARG]], 10
+; TUNIT-NEXT: br i1 [[TRUETMP4]], label [[BB5:%.*]], label [[BB7:%.*]]
; TUNIT: bb5:
-; TUNIT-NEXT: [[TMP6:%.*]] = add nsw i32 [[DOT02]], 1
+; TUNIT-NEXT: [[TRUETMP6:%.*]] = add nsw i32 [[DOT02]], 1
; TUNIT-NEXT: br label [[BB9:%.*]]
; TUNIT: bb7:
-; TUNIT-NEXT: [[TMP8:%.*]] = add nsw i32 [[DOT02]], 2
+; TUNIT-NEXT: [[TRUETMP8:%.*]] = add nsw i32 [[DOT02]], 2
; TUNIT-NEXT: br label [[BB9]]
; TUNIT: bb9:
-; TUNIT-NEXT: [[DOT01:%.*]] = phi i32 [ [[TMP6]], [[BB5]] ], [ [[TMP8]], [[BB7]] ]
-; TUNIT-NEXT: [[TMP10:%.*]] = icmp eq i32 [[DOT01]], 5
-; TUNIT-NEXT: br i1 [[TMP10]], label [[BB11:%.*]], label [[BB12:%.*]]
+; TUNIT-NEXT: [[DOT01:%.*]] = phi i32 [ [[TRUETMP6]], [[BB5]] ], [ [[TRUETMP8]], [[BB7]] ]
+; TUNIT-NEXT: [[TRUETMP10:%.*]] = icmp eq i32 [[DOT01]], 5
+; TUNIT-NEXT: br i1 [[TRUETMP10]], label [[BB11:%.*]], label [[BB12:%.*]]
; TUNIT: bb11:
; TUNIT-NEXT: br label [[BB13:%.*]]
; TUNIT: bb12:
@@ -762,18 +762,18 @@ define dso_local zeroext i1 @phi(i32 %arg) {
; CGSCC-NEXT: br label [[BB3]]
; CGSCC: bb3:
; CGSCC-NEXT: [[DOT02:%.*]] = phi i32 [ 1, [[BB1]] ], [ 2, [[BB2]] ]
-; CGSCC-NEXT: [[TMP4:%.*]] = icmp sgt i32 [[ARG]], 10
-; CGSCC-NEXT: br i1 [[TMP4]], label [[BB5:%.*]], label [[BB7:%.*]]
+; CGSCC-NEXT: [[TRUETMP4:%.*]] = icmp sgt i32 [[ARG]], 10
+; CGSCC-NEXT: br i1 [[TRUETMP4]], label [[BB5:%.*]], label [[BB7:%.*]]
; CGSCC: bb5:
-; CGSCC-NEXT: [[TMP6:%.*]] = add nsw i32 [[DOT02]], 1
+; CGSCC-NEXT: [[TRUETMP6:%.*]] = add nsw i32 [[DOT02]], 1
; CGSCC-NEXT: br label [[BB9:%.*]]
; CGSCC: bb7:
-; CGSCC-NEXT: [[TMP8:%.*]] = add nsw i32 [[DOT02]], 2
+; CGSCC-NEXT: [[TRUETMP8:%.*]] = add nsw i32 [[DOT02]], 2
; CGSCC-NEXT: br label [[BB9]]
; CGSCC: bb9:
-; CGSCC-NEXT: [[DOT01:%.*]] = phi i32 [ [[TMP6]], [[BB5]] ], [ [[TMP8]], [[BB7]] ]
-; CGSCC-NEXT: [[TMP10:%.*]] = icmp eq i32 [[DOT01]], 5
-; CGSCC-NEXT: br i1 [[TMP10]], label [[BB11:%.*]], label [[BB12:%.*]]
+; CGSCC-NEXT: [[DOT01:%.*]] = phi i32 [ [[TRUETMP6]], [[BB5]] ], [ [[TRUETMP8]], [[BB7]] ]
+; CGSCC-NEXT: [[TRUETMP10:%.*]] = icmp eq i32 [[DOT01]], 5
+; CGSCC-NEXT: br i1 [[TRUETMP10]], label [[BB11:%.*]], label [[BB12:%.*]]
; CGSCC: bb11:
; CGSCC-NEXT: br label [[BB13:%.*]]
; CGSCC: bb12:
@@ -1698,8 +1698,8 @@ define void @spam(ptr %arg, ptr %arg1) {
; CHECK-SAME: (ptr nocapture nofree noundef nonnull readonly align 8 dereferenceable(4) [[ARG:%.*]], ptr nocapture nofree readnone [[ARG1:%.*]]) {
; CHECK-NEXT: bb:
; CHECK-NEXT: [[TMP:%.*]] = load i32, ptr [[ARG]], align 8
-; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i32 [[TMP]], 4
-; CHECK-NEXT: br i1 [[TMP2]], label [[BB3:%.*]], label [[BB4:%.*]]
+; CHECK-NEXT: [[TRUETMP2:%.*]] = icmp ult i32 [[TMP]], 4
+; CHECK-NEXT: br i1 [[TRUETMP2]], label [[BB3:%.*]], label [[BB4:%.*]]
; CHECK: bb3:
; CHECK-NEXT: call fastcc void @wobble(i32 signext [[TMP]])
; CHECK-NEXT: br label [[BB5:%.*]]
diff --git a/llvm/test/Transforms/Attributor/value-simplify-local-remote.ll b/llvm/test/Transforms/Attributor/value-simplify-local-remote.ll
index 33770e75ef38ba..d7f8d23ac8689a 100644
--- a/llvm/test/Transforms/Attributor/value-simplify-local-remote.ll
+++ b/llvm/test/Transforms/Attributor/value-simplify-local-remote.ll
@@ -380,22 +380,22 @@ define dso_local void @spam() {
; TUNIT-NEXT: store i32 [[X]], ptr [[TMP]], align 4
; TUNIT-NEXT: br label [[BB16:%.*]]
; TUNIT: bb16:
-; TUNIT-NEXT: [[TMP18:%.*]] = icmp eq i32 [[X]], 0
-; TUNIT-NEXT: br i1 [[TMP18]], label [[BB35:%.*]], label [[BB19:%.*]]
+; TUNIT-NEXT: [[TRUETMP18:%.*]] = icmp eq i32 [[X]], 0
+; TUNIT-NEXT: br i1 [[TRUETMP18]], label [[BB35:%.*]], label [[BB19:%.*]]
; TUNIT: bb19:
-; TUNIT-NEXT: [[TMP21:%.*]] = load float, ptr [[TMP]], align 4
-; TUNIT-NEXT: [[TMP22:%.*]] = fadd fast float [[TMP21]], 0.000000e+00
+; TUNIT-NEXT: [[TRUETMP21:%.*]] = load float, ptr [[TMP]], align 4
+; TUNIT-NEXT: [[TRUETMP22:%.*]] = fadd fast float [[TRUETMP21]], 0.000000e+00
; TUNIT-NEXT: br label [[BB23:%.*]]
; TUNIT: bb23:
-; TUNIT-NEXT: [[TMP24:%.*]] = phi <2 x float> [ undef, [[BB19]] ], [ [[TMP26:%.*]], [[BB34:%.*]] ]
+; TUNIT-NEXT: [[TRUETMP24:%.*]] = phi <2 x float> [ undef, [[BB19]] ], [ [[TRUETMP26:%.*]], [[BB34:%.*]] ]
; TUNIT-NEXT: br label [[BB25:%.*]]
; TUNIT: bb25:
-; TUNIT-NEXT: [[TMP26]] = phi <2 x float> [ [[TMP30:%.*]], [[BB28:%.*]] ], [ [[TMP24]], [[BB23]] ]
-; TUNIT-NEXT: [[TMP27:%.*]] = icmp ult i32 undef, 8
-; TUNIT-NEXT: br i1 [[TMP27]], label [[BB28]], label [[BB34]]
+; TUNIT-NEXT: [[TRUETMP26]] = phi <2 x float> [ [[TRUETMP30:%.*]], [[BB28:%.*]] ], [ [[TRUETMP24]], [[BB23]] ]
+; TUNIT-NEXT: [[TRUETMP27:%.*]] = icmp ult i32 undef, 8
+; TUNIT-NEXT: br i1 [[TRUETMP27]], label [[BB28]], label [[BB34]]
; TUNIT: bb28:
-; TUNIT-NEXT: [[TMP29:%.*]] = insertelement <2 x float> [[TMP26]], float undef, i32 0
-; TUNIT-NEXT: [[TMP30]] = insertelement <2 x float> [[TMP29]], float [[TMP22]], i32 1
+; TUNIT-NEXT: [[TRUETMP29:%.*]] = insertelement <2 x float> [[TRUETMP26]], float undef, i32 0
+; TUNIT-NEXT: [[TRUETMP30]] = insertelement <2 x float> [[TRUETMP29]], float [[TRUETMP22]], i32 1
; TUNIT-NEXT: br label [[BB25]]
; TUNIT: bb34:
; TUNIT-NEXT: br label [[BB23]]
@@ -411,22 +411,22 @@ define dso_local void @spam() {
; CGSCC-NEXT: store i32 [[X]], ptr [[TMP]], align 4
; CGSCC-NEXT: br label [[BB16:%.*]]
; CGSCC: bb16:
-; CGSCC-NEXT: [[TMP18:%.*]] = icmp eq i32 [[X]], 0
-; CGSCC-NEXT: br i1 [[TMP18]], label [[BB35:%.*]], label [[BB19:%.*]]
+; CGSCC-NEXT: [[TRUETMP18:%.*]] = icmp eq i32 [[X]], 0
+; CGSCC-NEXT: br i1 [[TRUETMP18]], label [[BB35:%.*]], label [[BB19:%.*]]
; CGSCC: bb19:
-; CGSCC-NEXT: [[TMP21:%.*]] = load float, ptr [[TMP]], align 4
-; CGSCC-NEXT: [[TMP22:%.*]] = fadd fast float [[TMP21]], 0.000000e+00
+; CGSCC-NEXT: [[TRUETMP21:%.*]] = load float, ptr [[TMP]], align 4
+; CGSCC-NEXT: [[TRUETMP22:%.*]] = fadd fast float [[TRUETMP21]], 0.000000e+00
; CGSCC-NEXT: br label [[BB23:%.*]]
; CGSCC: bb23:
-; CGSCC-NEXT: [[TMP24:%.*]] = phi <2 x float> [ undef, [[BB19]] ], [ [[TMP26:%.*]], [[BB34:%.*]] ]
+; CGSCC-NEXT: [[TRUETMP24:%.*]] = phi <2 x float> [ undef, [[BB19]] ], [ [[TRUETMP26:%.*]], [[BB34:%.*]] ]
; CGSCC-NEXT: br label [[BB25:%.*]]
; CGSCC: bb25:
-; CGSCC-NEXT: [[TMP26]] = phi <2 x float> [ [[TMP30:%.*]], [[BB28:%.*]] ], [ [[TMP24]], [[BB23]] ]
-; CGSCC-NEXT: [[TMP27:%.*]] = icmp ult i32 undef, 8
-; CGSCC-NEXT: br i1 [[TMP27]], label [[BB28]], label [[BB34]]
+; CGSCC-NEXT: [[TRUETMP26]] = phi <2 x float> [ [[TRUETMP30:%.*]], [[BB28:%.*]] ], [ [[TRUETMP24]], [[BB23]] ]
+; CGSCC-NEXT: [[TRUETMP27:%.*]] = icmp ult i32 undef, 8
+; CGSCC-NEXT: br i1 [[TRUETMP27]], label [[BB28]], label [[BB34]]
; CGSCC: bb28:
-; CGSCC-NEXT: [[TMP29:%.*]] = insertelement <2 x float> [[TMP26]], float undef, i32 0
-; CGSCC-NEXT: [[TMP30]] = insertelement <2 x float> [[TMP29]], float [[TMP22]], i32 1
+; CGSCC-NEXT: [[TRUETMP29:%.*]] = insertelement <2 x float> [[TRUETMP26]], float undef, i32 0
+; CGSCC-NEXT: [[TRUETMP30]] = insertelement <2 x float> [[TRUETMP29]], float [[TRUETMP22]], i32 1
; CGSCC-NEXT: br label [[BB25]]
; CGSCC: bb34:
; CGSCC-NEXT: br label [[BB23]]
diff --git a/llvm/test/Transforms/Attributor/willreturn.ll b/llvm/test/Transforms/Attributor/willreturn.ll
index e41db443d0e446..9a2ae719ede63c 100644
--- a/llvm/test/Transforms/Attributor/willreturn.ll
+++ b/llvm/test/Transforms/Attributor/willreturn.ll
@@ -855,7 +855,7 @@ define i32 @bounded_loop_inside_unbounded_loop(i32 %n) {
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[WHILE_COND:%.*]]
; CHECK: while.cond:
-; CHECK-NEXT: [[ANS_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TMP2:%.*]], [[FOR_END:%.*]] ]
+; CHECK-NEXT: [[ANS_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TRUETMP2:%.*]], [[FOR_END:%.*]] ]
; CHECK-NEXT: [[N_ADDR_0:%.*]] = phi i32 [ [[N]], [[ENTRY]] ], [ [[INC:%.*]], [[FOR_END]] ]
; CHECK-NEXT: [[TMP:%.*]] = icmp sgt i32 [[N_ADDR_0]], -1
; CHECK-NEXT: [[SMAX:%.*]] = select i1 [[TMP]], i32 [[N_ADDR_0]], i32 -1
@@ -863,12 +863,12 @@ define i32 @bounded_loop_inside_unbounded_loop(i32 %n) {
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[N_ADDR_0]], 0
; CHECK-NEXT: br i1 [[TOBOOL]], label [[WHILE_END:%.*]], label [[WHILE_BODY:%.*]]
; CHECK: while.body:
-; CHECK-NEXT: [[TMP1:%.*]] = add i32 [[ANS_0]], 1
+; CHECK-NEXT: [[TRUETMP1:%.*]] = add i32 [[ANS_0]], 1
; CHECK-NEXT: br label [[FOR_COND:%.*]]
; CHECK: for.cond:
; CHECK-NEXT: br i1 true, label [[FOR_COND_CLEANUP:%.*]], label [[FOR_BODY:%.*]]
; CHECK: for.cond.cleanup:
-; CHECK-NEXT: [[TMP2]] = add i32 [[TMP1]], [[SMAX]]
+; CHECK-NEXT: [[TRUETMP2]] = add i32 [[TRUETMP1]], [[SMAX]]
; CHECK-NEXT: br label [[FOR_END]]
; CHECK: for.body:
; CHECK-NEXT: unreachable
@@ -939,7 +939,7 @@ define i32 @nested_unbounded_loops(i32 %n) {
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[WHILE_COND:%.*]]
; CHECK: while.cond:
-; CHECK-NEXT: [[ANS_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TMP1:%.*]], [[WHILE_END10:%.*]] ]
+; CHECK-NEXT: [[ANS_0:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[TRUETMP1:%.*]], [[WHILE_END10:%.*]] ]
; CHECK-NEXT: [[N_ADDR_0:%.*]] = phi i32 [ [[N]], [[ENTRY]] ], [ -1, [[WHILE_END10]] ]
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[N_ADDR_0]], 0
; CHECK-NEXT: br i1 [[TOBOOL]], label [[WHILE_END11:%.*]], label [[WHILE_BODY:%.*]]
@@ -957,7 +957,7 @@ define i32 @nested_unbounded_loops(i32 %n) {
; CHECK: while.body8:
; CHECK-NEXT: unreachable
; CHECK: while.end10:
-; CHECK-NEXT: [[TMP1]] = add i32 [[TMP]], [[ANS_0]]
+; CHECK-NEXT: [[TRUETMP1]] = add i32 [[TMP]], [[ANS_0]]
; CHECK-NEXT: br label [[WHILE_COND]]
; CHECK: while.end11:
; CHECK-NEXT: [[ANS_0_LCSSA:%.*]] = phi i32 [ [[ANS_0]], [[WHILE_COND]] ]
diff --git a/llvm/test/Transforms/OpenMP/value-simplify-openmp-opt.ll b/llvm/test/Transforms/OpenMP/value-simplify-openmp-opt.ll
index 148a971d7f071d..e8e2c4f4144ed6 100644
--- a/llvm/test/Transforms/OpenMP/value-simplify-openmp-opt.ll
+++ b/llvm/test/Transforms/OpenMP/value-simplify-openmp-opt.ll
@@ -27,44 +27,44 @@ target triple = "amdgcn-amd-amdhsa"
; Make sure we do not delete the stores to @G without also replacing the load with `1`.
;.
-; TUNIT: @G = internal addrspace(3) global i32 undef, align 4
-; TUNIT: @H = internal addrspace(3) global i32 undef, align 4
-; TUNIT: @X = internal addrspace(3) global i32 undef, align 4
-; TUNIT: @QA1 = internal addrspace(3) global i32 undef, align 4
-; TUNIT: @QB1 = internal addrspace(3) global i32 undef, align 4
-; TUNIT: @QC1 = internal addrspace(3) global i32 undef, align 4
-; TUNIT: @QD1 = internal addrspace(3) global i32 undef, align 4
-; TUNIT: @QA2 = internal addrspace(3) global i32 undef, align 4
-; TUNIT: @QB2 = internal addrspace(3) global i32 undef, align 4
-; TUNIT: @QC2 = internal addrspace(3) global i32 undef, align 4
-; TUNIT: @QD2 = internal addrspace(3) global i32 undef, align 4
-; TUNIT: @QA3 = internal addrspace(3) global i32 undef, align 4
-; TUNIT: @QB3 = internal addrspace(3) global i32 undef, align 4
-; TUNIT: @QC3 = internal addrspace(3) global i32 undef, align 4
-; TUNIT: @QD3 = internal addrspace(3) global i32 undef, align 4
-; TUNIT: @UAA1 = internal addrspace(3) global i32 undef, align 4
-; TUNIT: @UAA2 = internal addrspace(3) global i32 undef, align 4
-; TUNIT: @str = private unnamed_addr addrspace(4) constant [1 x i8] zeroinitializer, align 1
-; TUNIT: @kernel_nested_parallelism = weak constant i8 0
+; TUNIT: @[[G:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
+; TUNIT: @[[H:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
+; TUNIT: @[[X:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
+; TUNIT: @[[QA1:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
+; TUNIT: @[[QB1:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
+; TUNIT: @[[QC1:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
+; TUNIT: @[[QD1:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
+; TUNIT: @[[QA2:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
+; TUNIT: @[[QB2:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
+; TUNIT: @[[QC2:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
+; TUNIT: @[[QD2:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
+; TUNIT: @[[QA3:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
+; TUNIT: @[[QB3:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
+; TUNIT: @[[QC3:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
+; TUNIT: @[[QD3:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
+; TUNIT: @[[UAA1:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
+; TUNIT: @[[UAA2:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
+; TUNIT: @[[STR:[a-zA-Z0-9_$"\\.-]+]] = private unnamed_addr addrspace(4) constant [1 x i8] zeroinitializer, align 1
+; TUNIT: @[[KERNEL_NESTED_PARALLELISM:[a-zA-Z0-9_$"\\.-]+]] = weak constant i8 0
;.
-; CGSCC: @G = internal addrspace(3) global i32 undef, align 4
-; CGSCC: @H = internal addrspace(3) global i32 undef, align 4
-; CGSCC: @X = internal addrspace(3) global i32 undef, align 4
-; CGSCC: @QA1 = internal addrspace(3) global i32 undef, align 4
-; CGSCC: @QB1 = internal addrspace(3) global i32 undef, align 4
-; CGSCC: @QC1 = internal addrspace(3) global i32 undef, align 4
-; CGSCC: @QD1 = internal addrspace(3) global i32 undef, align 4
-; CGSCC: @QA2 = internal addrspace(3) global i32 undef, align 4
-; CGSCC: @QB2 = internal addrspace(3) global i32 undef, align 4
-; CGSCC: @QC2 = internal addrspace(3) global i32 undef, align 4
-; CGSCC: @QD2 = internal addrspace(3) global i32 undef, align 4
-; CGSCC: @QA3 = internal addrspace(3) global i32 undef, align 4
-; CGSCC: @QB3 = internal addrspace(3) global i32 undef, align 4
-; CGSCC: @QC3 = internal addrspace(3) global i32 undef, align 4
-; CGSCC: @QD3 = internal addrspace(3) global i32 undef, align 4
-; CGSCC: @UAA1 = internal addrspace(3) global i32 undef, align 4
-; CGSCC: @UAA2 = internal addrspace(3) global i32 undef, align 4
-; CGSCC: @str = private unnamed_addr addrspace(4) constant [1 x i8] zeroinitializer, align 1
+; CGSCC: @[[G:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
+; CGSCC: @[[H:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
+; CGSCC: @[[X:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
+; CGSCC: @[[QA1:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
+; CGSCC: @[[QB1:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
+; CGSCC: @[[QC1:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
+; CGSCC: @[[QD1:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
+; CGSCC: @[[QA2:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
+; CGSCC: @[[QB2:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
+; CGSCC: @[[QC2:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
+; CGSCC: @[[QD2:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
+; CGSCC: @[[QA3:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
+; CGSCC: @[[QB3:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
+; CGSCC: @[[QC3:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
+; CGSCC: @[[QD3:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
+; CGSCC: @[[UAA1:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
+; CGSCC: @[[UAA2:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 undef, align 4
+; CGSCC: @[[STR:[a-zA-Z0-9_$"\\.-]+]] = private unnamed_addr addrspace(4) constant [1 x i8] zeroinitializer, align 1
;.
define void @kernel() "kernel" {
;
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