[PATCH] D155311: [AArch64][GISel] Additional FPTrunc vector lowering

[Dave Green via Phabricator via llvm-commits]

dmgreen created this revision.
dmgreen added reviewers: aemerson, arsenm, paquette, Petar.Avramovic.
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I was attempting to add llvm.reduce.fminimum/fmaximum support for GlobalISel. In the process I noticed that llvm.reduce.fmin/fmax was missing, and could do with being added first. That led on to adding additional vector support for minnum/maxnum, which in turn led to needing to handle fptrunc and fpext for some of the fp16 types. So this patch extends the vector handling for fptrunc, adding support for f16 types which are clamped to 4 elements, and scalarizing the rest.

I went round in circles a little with how smaller than legal vectors should be handled, but this seems simple and seems to work, if not always optimally yet.


https://reviews.llvm.org/D155311

Files:
  llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
  llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-fptrunc.mir
  llvm/test/CodeGen/AArch64/fptrunc.ll

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