[llvm] 4136e08 - [IR] Remove LLVMPointerToElt and LLVMAnyPointerToElt intrinsic types (NFC)
Nikita Popov via llvm-commits
llvm-commits at lists.llvm.org
Fri Jul 14 00:30:47 PDT 2023
Author: Nikita Popov
Date: 2023-07-14T09:30:39+02:00
New Revision: 4136e08f14ae9043b46bbe0a101e8609164d1be5
URL: https://github.com/llvm/llvm-project/commit/4136e08f14ae9043b46bbe0a101e8609164d1be5
DIFF: https://github.com/llvm/llvm-project/commit/4136e08f14ae9043b46bbe0a101e8609164d1be5.diff
LOG: [IR] Remove LLVMPointerToElt and LLVMAnyPointerToElt intrinsic types (NFC)
With opaque pointers, LLVMPointerToElt can be replaced by llvm_ptr_ty
and LLVMAnyPointerToElt by llvm_anyptr_ty.
This still leaves LLVMVectorOfAnyPointersToElt, where we can't just
replace with an existing IIT descriptor.
Differential Revision: https://reviews.llvm.org/D155167
Added:
Modified:
llvm/include/llvm/IR/Intrinsics.h
llvm/include/llvm/IR/Intrinsics.td
llvm/include/llvm/IR/IntrinsicsAArch64.td
llvm/include/llvm/IR/IntrinsicsRISCV.td
llvm/lib/IR/Function.cpp
Removed:
################################################################################
diff --git a/llvm/include/llvm/IR/Intrinsics.h b/llvm/include/llvm/IR/Intrinsics.h
index 5154b265bbc911..0dfe9f029f9b1a 100644
--- a/llvm/include/llvm/IR/Intrinsics.h
+++ b/llvm/include/llvm/IR/Intrinsics.h
@@ -128,7 +128,6 @@ namespace Intrinsic {
TruncArgument,
HalfVecArgument,
SameVecWidthArgument,
- PtrToElt,
VecOfAnyPtrsToElt,
VecElementArgument,
Subdivide2Argument,
@@ -136,7 +135,6 @@ namespace Intrinsic {
VecOfBitcastsToInt,
AMX,
PPCQuad,
- AnyPtrToElt,
AArch64Svcount,
} Kind;
@@ -159,8 +157,7 @@ namespace Intrinsic {
unsigned getArgumentNumber() const {
assert(Kind == Argument || Kind == ExtendArgument ||
Kind == TruncArgument || Kind == HalfVecArgument ||
- Kind == SameVecWidthArgument ||
- Kind == PtrToElt || Kind == VecElementArgument ||
+ Kind == SameVecWidthArgument || Kind == VecElementArgument ||
Kind == Subdivide2Argument || Kind == Subdivide4Argument ||
Kind == VecOfBitcastsToInt);
return Argument_Info >> 3;
@@ -174,15 +171,14 @@ namespace Intrinsic {
return (ArgKind)(Argument_Info & 7);
}
- // VecOfAnyPtrsToElt and AnyPtrToElt uses both an overloaded argument (for
- // address space) and a reference argument (for matching vector width and
- // element types)
+ // VecOfAnyPtrsToElt uses both an overloaded argument (for address space)
+ // and a reference argument (for matching vector width and element types)
unsigned getOverloadArgNumber() const {
- assert(Kind == VecOfAnyPtrsToElt || Kind == AnyPtrToElt);
+ assert(Kind == VecOfAnyPtrsToElt);
return Argument_Info >> 16;
}
unsigned getRefArgNumber() const {
- assert(Kind == VecOfAnyPtrsToElt || Kind == AnyPtrToElt);
+ assert(Kind == VecOfAnyPtrsToElt);
return Argument_Info & 0xFFFF;
}
diff --git a/llvm/include/llvm/IR/Intrinsics.td b/llvm/include/llvm/IR/Intrinsics.td
index 2343ff52ca6e0c..e51c04fbad2f42 100644
--- a/llvm/include/llvm/IR/Intrinsics.td
+++ b/llvm/include/llvm/IR/Intrinsics.td
@@ -294,7 +294,6 @@ def IIT_V1 : IIT_Vec<1, 28>;
def IIT_VARARG : IIT_VT<isVoid, 29>;
def IIT_HALF_VEC_ARG : IIT_Base<30>;
def IIT_SAME_VEC_WIDTH_ARG : IIT_Base<31>;
-def IIT_PTR_TO_ELT : IIT_Base<33>;
def IIT_VEC_OF_ANYPTRS_TO_ELT : IIT_Base<34>;
def IIT_I128 : IIT_Int<128, 35>;
def IIT_V512 : IIT_Vec<512, 36>;
@@ -317,7 +316,6 @@ def IIT_PPCF128 : IIT_VT<ppcf128, 52>;
def IIT_V3 : IIT_Vec<3, 53>;
def IIT_EXTERNREF : IIT_VT<externref, 54>;
def IIT_FUNCREF : IIT_VT<funcref, 55>;
-def IIT_ANYPTR_TO_ELT : IIT_Base<56>;
def IIT_I2 : IIT_Int<2, 57>;
def IIT_I4 : IIT_Int<4, 58>;
def IIT_AARCH64_SVCOUNT : IIT_VT<aarch64svcount, 59>;
@@ -448,9 +446,6 @@ class LLVMScalarOrSameVectorWidth<int idx, LLVMType elty>
], elty.Sig);
}
-class LLVMPointerToElt<int num> : LLVMMatchType<num, IIT_PTR_TO_ELT>;
-class LLVMAnyPointerToElt<int num>
- : LLVMMatchTypeNextArg<num, IIT_ANYPTR_TO_ELT>;
class LLVMVectorOfAnyPointersToElt<int num>
: LLVMMatchTypeNextArg<num, IIT_VEC_OF_ANYPTRS_TO_ELT>;
class LLVMVectorElementType<int num> : LLVMMatchType<num, IIT_VEC_ELEMENT>;
@@ -2202,13 +2197,13 @@ def int_masked_scatter:
def int_masked_expandload:
DefaultAttrsIntrinsic<[llvm_anyvector_ty],
- [LLVMPointerToElt<0>, LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>,
+ [llvm_ptr_ty, LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>,
LLVMMatchType<0>],
[IntrReadMem, IntrWillReturn, NoCapture<ArgIndex<0>>]>;
def int_masked_compressstore:
DefaultAttrsIntrinsic<[],
- [llvm_anyvector_ty, LLVMPointerToElt<0>,
+ [llvm_anyvector_ty, llvm_ptr_ty,
LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>],
[IntrWriteMem, IntrArgMemOnly, IntrWillReturn,
NoCapture<ArgIndex<1>>]>;
@@ -2347,7 +2342,7 @@ def int_matrix_multiply
def int_matrix_column_major_load
: DefaultAttrsIntrinsic<[llvm_anyvector_ty],
- [LLVMPointerToElt<0>, llvm_anyint_ty, llvm_i1_ty,
+ [llvm_ptr_ty, llvm_anyint_ty, llvm_i1_ty,
llvm_i32_ty, llvm_i32_ty],
[IntrNoSync, IntrWillReturn, IntrArgMemOnly, IntrReadMem,
NoCapture<ArgIndex<0>>, ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<3>>,
@@ -2355,7 +2350,7 @@ def int_matrix_column_major_load
def int_matrix_column_major_store
: DefaultAttrsIntrinsic<[],
- [llvm_anyvector_ty, LLVMPointerToElt<0>,
+ [llvm_anyvector_ty, llvm_ptr_ty,
llvm_anyint_ty, llvm_i1_ty, llvm_i32_ty, llvm_i32_ty],
[IntrNoSync, IntrWillReturn, IntrArgMemOnly, IntrWriteMem,
WriteOnly<ArgIndex<1>>, NoCapture<ArgIndex<1>>,
diff --git a/llvm/include/llvm/IR/IntrinsicsAArch64.td b/llvm/include/llvm/IR/IntrinsicsAArch64.td
index c53c4f5a4e8906..557063c8813268 100644
--- a/llvm/include/llvm/IR/IntrinsicsAArch64.td
+++ b/llvm/include/llvm/IR/IntrinsicsAArch64.td
@@ -956,59 +956,53 @@ let TargetPrefix = "aarch64" in { // All intrinsics start with "llvm.aarch64.".
class AdvSIMD_1Vec_PredLoad_Intrinsic
: DefaultAttrsIntrinsic<[llvm_anyvector_ty],
- [LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>,
- LLVMPointerToElt<0>],
+ [LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>, llvm_ptr_ty],
[IntrReadMem, IntrArgMemOnly]>;
class AdvSIMD_2Vec_PredLoad_Intrinsic
: DefaultAttrsIntrinsic<[llvm_anyvector_ty, LLVMMatchType<0>],
- [LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>,
- LLVMPointerToElt<0>],
+ [LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>, llvm_ptr_ty],
[IntrReadMem, IntrArgMemOnly]>;
class AdvSIMD_3Vec_PredLoad_Intrinsic
: DefaultAttrsIntrinsic<[llvm_anyvector_ty, LLVMMatchType<0>, LLVMMatchType<0>],
- [LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>,
- LLVMPointerToElt<0>],
+ [LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>, llvm_ptr_ty],
[IntrReadMem, IntrArgMemOnly]>;
class AdvSIMD_4Vec_PredLoad_Intrinsic
: DefaultAttrsIntrinsic<[llvm_anyvector_ty, LLVMMatchType<0>, LLVMMatchType<0>,
LLVMMatchType<0>],
- [LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>,
- LLVMPointerToElt<0>],
+ [LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>, llvm_ptr_ty],
[IntrReadMem, IntrArgMemOnly]>;
class AdvSIMD_1Vec_PredLoad_WriteFFR_Intrinsic
: DefaultAttrsIntrinsic<[llvm_anyvector_ty],
- [LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>,
- LLVMPointerToElt<0>],
+ [LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>, llvm_ptr_ty],
[IntrInaccessibleMemOrArgMemOnly]>;
class AdvSIMD_1Vec_PredStore_Intrinsic
: DefaultAttrsIntrinsic<[],
[llvm_anyvector_ty,
- LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>,
- LLVMPointerToElt<0>],
+ LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>, llvm_ptr_ty],
[IntrArgMemOnly, NoCapture<ArgIndex<2>>]>;
class AdvSIMD_2Vec_PredStore_Intrinsic
: DefaultAttrsIntrinsic<[],
[llvm_anyvector_ty, LLVMMatchType<0>,
- LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>, LLVMPointerToElt<0>],
+ LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>, llvm_ptr_ty],
[IntrArgMemOnly, NoCapture<ArgIndex<3>>]>;
class AdvSIMD_3Vec_PredStore_Intrinsic
: DefaultAttrsIntrinsic<[],
[llvm_anyvector_ty, LLVMMatchType<0>, LLVMMatchType<0>,
- LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>, LLVMPointerToElt<0>],
+ LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>, llvm_ptr_ty],
[IntrArgMemOnly, NoCapture<ArgIndex<4>>]>;
class AdvSIMD_4Vec_PredStore_Intrinsic
: DefaultAttrsIntrinsic<[],
[llvm_anyvector_ty, LLVMMatchType<0>, LLVMMatchType<0>,
LLVMMatchType<0>,
- LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>, LLVMPointerToElt<0>],
+ LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>, llvm_ptr_ty],
[IntrArgMemOnly, NoCapture<ArgIndex<5>>]>;
class AdvSIMD_SVE_Index_Intrinsic
@@ -1422,7 +1416,7 @@ class AdvSIMD_GatherLoad_SV_64b_Offsets_Intrinsic
: DefaultAttrsIntrinsic<[llvm_anyvector_ty],
[
LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>,
- LLVMPointerToElt<0>,
+ llvm_ptr_ty,
LLVMScalarOrSameVectorWidth<0, llvm_i64_ty>
],
[IntrReadMem, IntrArgMemOnly]>;
@@ -1431,7 +1425,7 @@ class AdvSIMD_GatherLoad_SV_64b_Offsets_WriteFFR_Intrinsic
: DefaultAttrsIntrinsic<[llvm_anyvector_ty],
[
LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>,
- LLVMPointerToElt<0>,
+ llvm_ptr_ty,
LLVMScalarOrSameVectorWidth<0, llvm_i64_ty>
],
[IntrInaccessibleMemOrArgMemOnly]>;
@@ -1440,7 +1434,7 @@ class AdvSIMD_GatherLoad_SV_32b_Offsets_Intrinsic
: DefaultAttrsIntrinsic<[llvm_anyvector_ty],
[
LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>,
- LLVMPointerToElt<0>,
+ llvm_ptr_ty,
LLVMScalarOrSameVectorWidth<0, llvm_i32_ty>
],
[IntrReadMem, IntrArgMemOnly]>;
@@ -1449,7 +1443,7 @@ class AdvSIMD_GatherLoad_SV_32b_Offsets_WriteFFR_Intrinsic
: DefaultAttrsIntrinsic<[llvm_anyvector_ty],
[
LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>,
- LLVMPointerToElt<0>,
+ llvm_ptr_ty,
LLVMScalarOrSameVectorWidth<0, llvm_i32_ty>
],
[IntrInaccessibleMemOrArgMemOnly]>;
@@ -1477,7 +1471,7 @@ class AdvSIMD_ScatterStore_SV_64b_Offsets_Intrinsic
[
llvm_anyvector_ty,
LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>,
- LLVMPointerToElt<0>,
+ llvm_ptr_ty,
LLVMScalarOrSameVectorWidth<0, llvm_i64_ty>
],
[IntrWriteMem, IntrArgMemOnly]>;
@@ -1487,7 +1481,7 @@ class AdvSIMD_ScatterStore_SV_32b_Offsets_Intrinsic
[
llvm_anyvector_ty,
LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>,
- LLVMPointerToElt<0>,
+ llvm_ptr_ty,
LLVMScalarOrSameVectorWidth<0, llvm_i32_ty>
],
[IntrWriteMem, IntrArgMemOnly]>;
diff --git a/llvm/include/llvm/IR/IntrinsicsRISCV.td b/llvm/include/llvm/IR/IntrinsicsRISCV.td
index 7b7df970b9e6c2..10c637ecd25a01 100644
--- a/llvm/include/llvm/IR/IntrinsicsRISCV.td
+++ b/llvm/include/llvm/IR/IntrinsicsRISCV.td
@@ -1006,7 +1006,7 @@ let TargetPrefix = "riscv" in {
: DefaultAttrsIntrinsic<!listconcat([llvm_anyvector_ty], !listsplat(LLVMMatchType<0>,
!add(nf, -1))),
!listconcat(!listsplat(LLVMMatchType<0>, nf),
- [LLVMPointerToElt<0>, llvm_anyint_ty]),
+ [llvm_ptr_ty, llvm_anyint_ty]),
[NoCapture<ArgIndex<nf>>, IntrReadMem]>, RISCVVIntrinsic {
let VLOperand = !add(nf, 1);
}
@@ -1016,7 +1016,7 @@ let TargetPrefix = "riscv" in {
: DefaultAttrsIntrinsic<!listconcat([llvm_anyvector_ty], !listsplat(LLVMMatchType<0>,
!add(nf, -1))),
!listconcat(!listsplat(LLVMMatchType<0>, nf),
- [LLVMPointerToElt<0>,
+ [llvm_ptr_ty,
LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>,
llvm_anyint_ty, LLVMMatchType<1>]),
[ImmArg<ArgIndex<!add(nf, 3)>>, NoCapture<ArgIndex<nf>>, IntrReadMem]>,
@@ -1033,7 +1033,7 @@ let TargetPrefix = "riscv" in {
: DefaultAttrsIntrinsic<!listconcat([llvm_anyvector_ty], !listsplat(LLVMMatchType<0>,
!add(nf, -1)), [llvm_anyint_ty]),
!listconcat(!listsplat(LLVMMatchType<0>, nf),
- [LLVMPointerToElt<0>, LLVMMatchType<1>]),
+ [llvm_ptr_ty, LLVMMatchType<1>]),
[NoCapture<ArgIndex<nf>>]>, RISCVVIntrinsic {
let VLOperand = !add(nf, 1);
}
@@ -1046,7 +1046,7 @@ let TargetPrefix = "riscv" in {
: DefaultAttrsIntrinsic<!listconcat([llvm_anyvector_ty], !listsplat(LLVMMatchType<0>,
!add(nf, -1)), [llvm_anyint_ty]),
!listconcat(!listsplat(LLVMMatchType<0>, nf),
- [LLVMPointerToElt<0>,
+ [llvm_ptr_ty,
LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>,
LLVMMatchType<1>, LLVMMatchType<1>]),
[ImmArg<ArgIndex<!add(nf, 3)>>, NoCapture<ArgIndex<nf>>]>,
@@ -1060,7 +1060,7 @@ let TargetPrefix = "riscv" in {
: DefaultAttrsIntrinsic<!listconcat([llvm_anyvector_ty], !listsplat(LLVMMatchType<0>,
!add(nf, -1))),
!listconcat(!listsplat(LLVMMatchType<0>, nf),
- [LLVMPointerToElt<0>, llvm_anyint_ty, LLVMMatchType<1>]),
+ [llvm_ptr_ty, llvm_anyint_ty, LLVMMatchType<1>]),
[NoCapture<ArgIndex<nf>>, IntrReadMem]>, RISCVVIntrinsic {
let VLOperand = !add(nf, 2);
}
@@ -1070,7 +1070,7 @@ let TargetPrefix = "riscv" in {
: DefaultAttrsIntrinsic<!listconcat([llvm_anyvector_ty], !listsplat(LLVMMatchType<0>,
!add(nf, -1))),
!listconcat(!listsplat(LLVMMatchType<0>, nf),
- [LLVMPointerToElt<0>,
+ [llvm_ptr_ty,
llvm_anyint_ty,
LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>,
LLVMMatchType<1>, LLVMMatchType<1>]),
@@ -1085,7 +1085,7 @@ let TargetPrefix = "riscv" in {
: DefaultAttrsIntrinsic<!listconcat([llvm_anyvector_ty], !listsplat(LLVMMatchType<0>,
!add(nf, -1))),
!listconcat(!listsplat(LLVMMatchType<0>, nf),
- [LLVMPointerToElt<0>, llvm_anyvector_ty, llvm_anyint_ty]),
+ [llvm_ptr_ty, llvm_anyvector_ty, llvm_anyint_ty]),
[NoCapture<ArgIndex<nf>>, IntrReadMem]>, RISCVVIntrinsic {
let VLOperand = !add(nf, 2);
}
@@ -1095,7 +1095,7 @@ let TargetPrefix = "riscv" in {
: DefaultAttrsIntrinsic<!listconcat([llvm_anyvector_ty], !listsplat(LLVMMatchType<0>,
!add(nf, -1))),
!listconcat(!listsplat(LLVMMatchType<0>, nf),
- [LLVMPointerToElt<0>,
+ [llvm_ptr_ty,
llvm_anyvector_ty,
LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>,
llvm_anyint_ty, LLVMMatchType<2>]),
@@ -1110,7 +1110,7 @@ let TargetPrefix = "riscv" in {
: DefaultAttrsIntrinsic<[],
!listconcat([llvm_anyvector_ty],
!listsplat(LLVMMatchType<0>, !add(nf, -1)),
- [LLVMPointerToElt<0>, llvm_anyint_ty]),
+ [llvm_ptr_ty, llvm_anyint_ty]),
[NoCapture<ArgIndex<nf>>, IntrWriteMem]>, RISCVVIntrinsic {
let VLOperand = !add(nf, 1);
}
@@ -1120,7 +1120,7 @@ let TargetPrefix = "riscv" in {
: DefaultAttrsIntrinsic<[],
!listconcat([llvm_anyvector_ty],
!listsplat(LLVMMatchType<0>, !add(nf, -1)),
- [LLVMPointerToElt<0>,
+ [llvm_ptr_ty,
LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>,
llvm_anyint_ty]),
[NoCapture<ArgIndex<nf>>, IntrWriteMem]>, RISCVVIntrinsic {
@@ -1133,7 +1133,7 @@ let TargetPrefix = "riscv" in {
: DefaultAttrsIntrinsic<[],
!listconcat([llvm_anyvector_ty],
!listsplat(LLVMMatchType<0>, !add(nf, -1)),
- [LLVMPointerToElt<0>, llvm_anyint_ty,
+ [llvm_ptr_ty, llvm_anyint_ty,
LLVMMatchType<1>]),
[NoCapture<ArgIndex<nf>>, IntrWriteMem]>, RISCVVIntrinsic {
let VLOperand = !add(nf, 2);
@@ -1144,7 +1144,7 @@ let TargetPrefix = "riscv" in {
: DefaultAttrsIntrinsic<[],
!listconcat([llvm_anyvector_ty],
!listsplat(LLVMMatchType<0>, !add(nf, -1)),
- [LLVMPointerToElt<0>, llvm_anyint_ty,
+ [llvm_ptr_ty, llvm_anyint_ty,
LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>,
LLVMMatchType<1>]),
[NoCapture<ArgIndex<nf>>, IntrWriteMem]>, RISCVVIntrinsic {
@@ -1157,7 +1157,7 @@ let TargetPrefix = "riscv" in {
: DefaultAttrsIntrinsic<[],
!listconcat([llvm_anyvector_ty],
!listsplat(LLVMMatchType<0>, !add(nf, -1)),
- [LLVMPointerToElt<0>, llvm_anyvector_ty,
+ [llvm_ptr_ty, llvm_anyvector_ty,
llvm_anyint_ty]),
[NoCapture<ArgIndex<nf>>, IntrWriteMem]>, RISCVVIntrinsic {
let VLOperand = !add(nf, 2);
@@ -1168,7 +1168,7 @@ let TargetPrefix = "riscv" in {
: DefaultAttrsIntrinsic<[],
!listconcat([llvm_anyvector_ty],
!listsplat(LLVMMatchType<0>, !add(nf, -1)),
- [LLVMPointerToElt<0>, llvm_anyvector_ty,
+ [llvm_ptr_ty, llvm_anyvector_ty,
LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>,
llvm_anyint_ty]),
[NoCapture<ArgIndex<nf>>, IntrWriteMem]>, RISCVVIntrinsic {
diff --git a/llvm/lib/IR/Function.cpp b/llvm/lib/IR/Function.cpp
index 0986949331ce40..3037457d4fffb0 100644
--- a/llvm/lib/IR/Function.cpp
+++ b/llvm/lib/IR/Function.cpp
@@ -1207,18 +1207,6 @@ static void DecodeIITType(unsigned &NextElt, ArrayRef<unsigned char> Infos,
ArgInfo));
return;
}
- case IIT_PTR_TO_ELT: {
- unsigned ArgInfo = (NextElt == Infos.size() ? 0 : Infos[NextElt++]);
- OutputTable.push_back(IITDescriptor::get(IITDescriptor::PtrToElt, ArgInfo));
- return;
- }
- case IIT_ANYPTR_TO_ELT: {
- unsigned short ArgNo = (NextElt == Infos.size() ? 0 : Infos[NextElt++]);
- unsigned short RefNo = (NextElt == Infos.size() ? 0 : Infos[NextElt++]);
- OutputTable.push_back(
- IITDescriptor::get(IITDescriptor::AnyPtrToElt, ArgNo, RefNo));
- return;
- }
case IIT_VEC_OF_ANYPTRS_TO_ELT: {
unsigned short ArgNo = (NextElt == Infos.size() ? 0 : Infos[NextElt++]);
unsigned short RefNo = (NextElt == Infos.size() ? 0 : Infos[NextElt++]);
@@ -1384,14 +1372,6 @@ static Type *DecodeFixedType(ArrayRef<Intrinsic::IITDescriptor> &Infos,
return VectorType::get(EltTy, VTy->getElementCount());
return EltTy;
}
- case IITDescriptor::PtrToElt: {
- Type *Ty = Tys[D.getArgumentNumber()];
- VectorType *VTy = dyn_cast<VectorType>(Ty);
- if (!VTy)
- llvm_unreachable("Expected an argument of Vector Type");
- Type *EltTy = VTy->getElementType();
- return PointerType::getUnqual(EltTy);
- }
case IITDescriptor::VecElementArgument: {
Type *Ty = Tys[D.getArgumentNumber()];
if (VectorType *VTy = dyn_cast<VectorType>(Ty))
@@ -1407,9 +1387,6 @@ static Type *DecodeFixedType(ArrayRef<Intrinsic::IITDescriptor> &Infos,
case IITDescriptor::VecOfAnyPtrsToElt:
// Return the overloaded type (which determines the pointers address space)
return Tys[D.getOverloadArgNumber()];
- case IITDescriptor::AnyPtrToElt:
- // Return the overloaded type (which determines the pointers address space)
- return Tys[D.getOverloadArgNumber()];
}
llvm_unreachable("unhandled");
}
@@ -1612,42 +1589,6 @@ static bool matchIntrinsicType(
return matchIntrinsicType(EltTy, Infos, ArgTys, DeferredChecks,
IsDeferredCheck);
}
- case IITDescriptor::PtrToElt: {
- if (D.getArgumentNumber() >= ArgTys.size())
- return IsDeferredCheck || DeferCheck(Ty);
- VectorType * ReferenceType =
- dyn_cast<VectorType> (ArgTys[D.getArgumentNumber()]);
- PointerType *ThisArgType = dyn_cast<PointerType>(Ty);
-
- if (!ThisArgType || !ReferenceType)
- return true;
- return !ThisArgType->isOpaqueOrPointeeTypeMatches(
- ReferenceType->getElementType());
- }
- case IITDescriptor::AnyPtrToElt: {
- unsigned RefArgNumber = D.getRefArgNumber();
- if (RefArgNumber >= ArgTys.size()) {
- if (IsDeferredCheck)
- return true;
- // If forward referencing, already add the pointer type and
- // defer the checks for later.
- ArgTys.push_back(Ty);
- return DeferCheck(Ty);
- }
-
- if (!IsDeferredCheck) {
- assert(D.getOverloadArgNumber() == ArgTys.size() &&
- "Table consistency error");
- ArgTys.push_back(Ty);
- }
-
- auto *ReferenceType = dyn_cast<VectorType>(ArgTys[RefArgNumber]);
- auto *ThisArgType = dyn_cast<PointerType>(Ty);
- if (!ThisArgType || !ReferenceType)
- return true;
- return !ThisArgType->isOpaqueOrPointeeTypeMatches(
- ReferenceType->getElementType());
- }
case IITDescriptor::VecOfAnyPtrsToElt: {
unsigned RefArgNumber = D.getRefArgNumber();
if (RefArgNumber >= ArgTys.size()) {
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