[PATCH] D155087: [CodeGen] Fix assertion failure caused by inline assembly

[Bryan Chan via Phabricator via llvm-commits]

bryanpkc added inline comments.


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Comment at: llvm/lib/CodeGen/RegAllocFast.cpp:941
+      setPhysReg(MI, MO, *AllocationOrder.begin());
+      return true;
+    }
----------------
Why doesn't this return the result of `setPhysReg`?

You should also add a comment to explain that since there was an error finding a suitable register for `LRI`, we just pick a register at random and bail out of the function immediately.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D155087/new/

https://reviews.llvm.org/D155087