[PATCH] D155104: [RISCV] Correct even register check for amocas.

[Craig Topper via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG40779e840062: [RISCV] Correct even register check for amocas. (authored by craig.topper).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D155104/new/

https://reviews.llvm.org/D155104

Files:
  llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp


Index: llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
===================================================================
--- llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+++ llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
@@ -3285,11 +3285,13 @@
   if ((!isRV64() && IsAMOCAS_D) || IsAMOCAS_Q) {
     unsigned Rd = Inst.getOperand(0).getReg();
     unsigned Rs2 = Inst.getOperand(2).getReg();
-    if (Rd % 2 != 0) {
+    assert(Rd >= RISCV::X0 && Rd <= RISCV::X31);
+    if ((Rd - RISCV::X0) % 2 != 0) {
       SMLoc Loc = Operands[1]->getStartLoc();
       return Error(Loc, "The destination register must be even.");
     }
-    if (Rs2 % 2 != 0) {
+    assert(Rs2 >= RISCV::X0 && Rs2 <= RISCV::X31);
+    if ((Rs2 - RISCV::X0) % 2 != 0) {
       SMLoc Loc = Operands[2]->getStartLoc();
       return Error(Loc, "The source register must be even.");
     }


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D155104.539690.patch
Type: text/x-patch
Size: 874 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20230712/dc036692/attachment.bin>