[PATCH] D153974: [RISCV] Don't include X1 in the X0_PD register pair

Wed Jul 12 07:31:04 PDT 2023

asb added a subscriber: MatzeB.
asb added a comment.

In D153974#4461536 <https://reviews.llvm.org/D153974#4461536>, @craig.topper wrote:

> I don't have any better ideas. The test change is kind of weird.

>From tracing through, I think (at least from looking for the likely divergence in a -debug trace) the issue is a change in the regPressureSetLimit for GPRs (going from 28 to 29). The PGPR regpressure limit goes from 14 to 13 and GPRC_with_PGPR changes name to PGPR_with_GPRC and goes from 20 to 19.

@MatzeB does this sound like a possible bug in the register pressure code (or indeed, us doing something wrong), or is this just expected change when altering the register set?

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https://reviews.llvm.org/D153974