[PATCH] D153499: [RISCV] Add support for custom CSRs for Sifive S76.
garvit gupta via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 12 04:47:21 PDT 2023
garvitgupta08 updated this revision to Diff 539504.
garvitgupta08 edited the summary of this revision.
garvitgupta08 added a comment.
Addressing the comments
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D153499/new/
https://reviews.llvm.org/D153499
Files:
llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.cpp
llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
llvm/lib/Target/RISCV/RISCVSystemOperands.td
llvm/test/MC/RISCV/xsfcie-invalid.s
llvm/test/MC/RISCV/xsfcie-valid.s
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