[llvm] cfa9275 - [LSR] Convert some tests to opaque pointers (NFC)
Nikita Popov via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 12 00:46:25 PDT 2023
Author: Nikita Popov
Date: 2023-07-12T09:46:08+02:00
New Revision: cfa92758886e4e8c6f7568d7b1ee583effe16911
URL: https://github.com/llvm/llvm-project/commit/cfa92758886e4e8c6f7568d7b1ee583effe16911
DIFF: https://github.com/llvm/llvm-project/commit/cfa92758886e4e8c6f7568d7b1ee583effe16911.diff
LOG: [LSR] Convert some tests to opaque pointers (NFC)
Added:
Modified:
llvm/test/Transforms/LoopStrengthReduce/ARM/complexity.ll
llvm/test/Transforms/LoopStrengthReduce/addrec-gep-address-space.ll
llvm/test/Transforms/LoopStrengthReduce/addrec-gep.ll
llvm/test/Transforms/LoopStrengthReduce/illegal-addr-modes.ll
llvm/test/Transforms/LoopStrengthReduce/missing-phi-operand-update.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/LoopStrengthReduce/ARM/complexity.ll b/llvm/test/Transforms/LoopStrengthReduce/ARM/complexity.ll
index fd2f9047f31d21..9ad65439f5a438 100644
--- a/llvm/test/Transforms/LoopStrengthReduce/ARM/complexity.ll
+++ b/llvm/test/Transforms/LoopStrengthReduce/ARM/complexity.ll
@@ -1,17 +1,17 @@
target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
-; RUN: opt -opaque-pointers=0 -mtriple=thumbv7em %s -S -loop-reduce -lsr-complexity-limit=65536 -o - | FileCheck %s
-; RUN: opt -opaque-pointers=0 -mtriple=thumbv7em %s -S -loop-reduce -lsr-complexity-limit=2147483647 -o - | FileCheck %s
+; RUN: opt -mtriple=thumbv7em %s -S -loop-reduce -lsr-complexity-limit=65536 -o - | FileCheck %s
+; RUN: opt -mtriple=thumbv7em %s -S -loop-reduce -lsr-complexity-limit=2147483647 -o - | FileCheck %s
; CHECK-LABEL: for.body12.us.us:
-; CHECK: [[LSR_IV6:%[^ ]+]] = phi i16* [ [[SCEVGEP7:%[^ ]+]], %for.body12.us.us ], [ [[SCEVGEP5:%[^ ]+]], %for.cond9.preheader.us.us ]
+; CHECK: [[LSR_IV6:%[^ ]+]] = phi ptr [ [[SCEVGEP7:%[^ ]+]], %for.body12.us.us ], [ [[SCEVGEP5:%[^ ]+]], %for.cond9.preheader.us.us ]
; CHECK: phi i32
-; CHECK: [[LSR_IV:%[^ ]+]] = phi i16* [ [[SCEVGEP1:%[^ ]+]], %for.body12.us.us ], [ [[SCEVGEP:%[^ ]+]], %for.cond9.preheader.us.us ]
+; CHECK: [[LSR_IV:%[^ ]+]] = phi ptr [ [[SCEVGEP1:%[^ ]+]], %for.body12.us.us ], [ [[SCEVGEP:%[^ ]+]], %for.cond9.preheader.us.us ]
; CHECK: phi i32
-; CHECK: [[SCEVGEP1]] = getelementptr i16, i16* [[LSR_IV]], i32 4
-; CHECK: [[SCEVGEP7]] = getelementptr i16, i16* [[LSR_IV6]], i32 4
+; CHECK: [[SCEVGEP1]] = getelementptr i8, ptr [[LSR_IV]], i32 8
+; CHECK: [[SCEVGEP7]] = getelementptr i8, ptr [[LSR_IV6]], i32 8
-define void @convolve(i16** nocapture readonly %input_image, i16** nocapture readonly %filter, i32 %filter_dim, i32 %out_width, i32 %out_height, i32** nocapture readonly %convolved) {
+define void @convolve(ptr nocapture readonly %input_image, ptr nocapture readonly %filter, i32 %filter_dim, i32 %out_width, i32 %out_height, ptr nocapture readonly %convolved) {
entry:
%cmp92 = icmp eq i32 %out_height, 0
br i1 %cmp92, label %for.cond.cleanup, label %for.cond1.preheader.lr.ph
@@ -23,8 +23,8 @@ for.cond1.preheader.lr.ph: ; preds = %entry
for.cond1.preheader: ; preds = %for.cond.cleanup3, %for.cond1.preheader.lr.ph
%res_y.093 = phi i32 [ 0, %for.cond1.preheader.lr.ph ], [ %add28, %for.cond.cleanup3 ]
- %arrayidx22 = getelementptr inbounds i32*, i32** %convolved, i32 %res_y.093
- %tmp3 = load i32*, i32** %arrayidx22, align 4
+ %arrayidx22 = getelementptr inbounds ptr, ptr %convolved, i32 %res_y.093
+ %tmp3 = load ptr, ptr %arrayidx22, align 4
br label %for.cond9.preheader.us.us.preheader
for.cond9.preheader.us.us.preheader: ; preds = %for.cond5.for.cond.cleanup7_crit_edge.us, %for.cond5.preheader.lr.ph
@@ -35,10 +35,10 @@ for.cond9.preheader.us.us: ; preds = %for.cond9.for.cond.
%filter_y.056.us.us = phi i32 [ %inc20.us.us, %for.cond9.for.cond.cleanup11_crit_edge.us.us.unr-lcssa ], [ 0, %for.cond9.preheader.us.us.preheader ]
%result_element.055.us.us = phi i32 [ %add18.us.us.3, %for.cond9.for.cond.cleanup11_crit_edge.us.us.unr-lcssa ], [ 0, %for.cond9.preheader.us.us.preheader ]
%add.us.us = add i32 %filter_y.056.us.us, %res_y.093
- %arrayidx.us.us = getelementptr inbounds i16*, i16** %filter, i32 %filter_y.056.us.us
- %tmp5 = load i16*, i16** %arrayidx.us.us, align 4
- %arrayidx15.us.us = getelementptr inbounds i16*, i16** %input_image, i32 %add.us.us
- %tmp6 = load i16*, i16** %arrayidx15.us.us, align 4
+ %arrayidx.us.us = getelementptr inbounds ptr, ptr %filter, i32 %filter_y.056.us.us
+ %tmp5 = load ptr, ptr %arrayidx.us.us, align 4
+ %arrayidx15.us.us = getelementptr inbounds ptr, ptr %input_image, i32 %add.us.us
+ %tmp6 = load ptr, ptr %arrayidx15.us.us, align 4
br label %for.body12.us.us
for.body12.us.us: ; preds = %for.body12.us.us, %for.cond9.preheader.us.us
@@ -46,41 +46,41 @@ for.body12.us.us: ; preds = %for.body12.us.us, %
%result_element.152.us.us = phi i32 [ %add18.us.us.3, %for.body12.us.us ], [ %result_element.055.us.us, %for.cond9.preheader.us.us ]
%niter = phi i32 [ %niter.nsub.3, %for.body12.us.us ], [ %unroll_iter, %for.cond9.preheader.us.us ]
%add13.us.us = add i32 %filter_x.053.us.us, %res_x.060.us
- %arrayidx14.us.us = getelementptr inbounds i16, i16* %tmp5, i32 %filter_x.053.us.us
- %tmp9 = load i16, i16* %arrayidx14.us.us, align 2
+ %arrayidx14.us.us = getelementptr inbounds i16, ptr %tmp5, i32 %filter_x.053.us.us
+ %tmp9 = load i16, ptr %arrayidx14.us.us, align 2
%conv.us.us = sext i16 %tmp9 to i32
- %arrayidx16.us.us = getelementptr inbounds i16, i16* %tmp6, i32 %add13.us.us
- %tmp10 = load i16, i16* %arrayidx16.us.us, align 2
+ %arrayidx16.us.us = getelementptr inbounds i16, ptr %tmp6, i32 %add13.us.us
+ %tmp10 = load i16, ptr %arrayidx16.us.us, align 2
%conv17.us.us = sext i16 %tmp10 to i32
%mul.us.us = mul nsw i32 %conv17.us.us, %conv.us.us
%add18.us.us = add nsw i32 %mul.us.us, %result_element.152.us.us
%inc.us.us = or i32 %filter_x.053.us.us, 1
%add13.us.us.1 = add i32 %inc.us.us, %res_x.060.us
- %arrayidx14.us.us.1 = getelementptr inbounds i16, i16* %tmp5, i32 %inc.us.us
- %tmp11 = load i16, i16* %arrayidx14.us.us.1, align 2
+ %arrayidx14.us.us.1 = getelementptr inbounds i16, ptr %tmp5, i32 %inc.us.us
+ %tmp11 = load i16, ptr %arrayidx14.us.us.1, align 2
%conv.us.us.1 = sext i16 %tmp11 to i32
- %arrayidx16.us.us.1 = getelementptr inbounds i16, i16* %tmp6, i32 %add13.us.us.1
- %tmp12 = load i16, i16* %arrayidx16.us.us.1, align 2
+ %arrayidx16.us.us.1 = getelementptr inbounds i16, ptr %tmp6, i32 %add13.us.us.1
+ %tmp12 = load i16, ptr %arrayidx16.us.us.1, align 2
%conv17.us.us.1 = sext i16 %tmp12 to i32
%mul.us.us.1 = mul nsw i32 %conv17.us.us.1, %conv.us.us.1
%add18.us.us.1 = add nsw i32 %mul.us.us.1, %add18.us.us
%inc.us.us.1 = or i32 %filter_x.053.us.us, 2
%add13.us.us.2 = add i32 %inc.us.us.1, %res_x.060.us
- %arrayidx14.us.us.2 = getelementptr inbounds i16, i16* %tmp5, i32 %inc.us.us.1
- %tmp13 = load i16, i16* %arrayidx14.us.us.2, align 2
+ %arrayidx14.us.us.2 = getelementptr inbounds i16, ptr %tmp5, i32 %inc.us.us.1
+ %tmp13 = load i16, ptr %arrayidx14.us.us.2, align 2
%conv.us.us.2 = sext i16 %tmp13 to i32
- %arrayidx16.us.us.2 = getelementptr inbounds i16, i16* %tmp6, i32 %add13.us.us.2
- %tmp14 = load i16, i16* %arrayidx16.us.us.2, align 2
+ %arrayidx16.us.us.2 = getelementptr inbounds i16, ptr %tmp6, i32 %add13.us.us.2
+ %tmp14 = load i16, ptr %arrayidx16.us.us.2, align 2
%conv17.us.us.2 = sext i16 %tmp14 to i32
%mul.us.us.2 = mul nsw i32 %conv17.us.us.2, %conv.us.us.2
%add18.us.us.2 = add nsw i32 %mul.us.us.2, %add18.us.us.1
%inc.us.us.2 = or i32 %filter_x.053.us.us, 3
%add13.us.us.3 = add i32 %inc.us.us.2, %res_x.060.us
- %arrayidx14.us.us.3 = getelementptr inbounds i16, i16* %tmp5, i32 %inc.us.us.2
- %tmp15 = load i16, i16* %arrayidx14.us.us.3, align 2
+ %arrayidx14.us.us.3 = getelementptr inbounds i16, ptr %tmp5, i32 %inc.us.us.2
+ %tmp15 = load i16, ptr %arrayidx14.us.us.3, align 2
%conv.us.us.3 = sext i16 %tmp15 to i32
- %arrayidx16.us.us.3 = getelementptr inbounds i16, i16* %tmp6, i32 %add13.us.us.3
- %tmp16 = load i16, i16* %arrayidx16.us.us.3, align 2
+ %arrayidx16.us.us.3 = getelementptr inbounds i16, ptr %tmp6, i32 %add13.us.us.3
+ %tmp16 = load i16, ptr %arrayidx16.us.us.3, align 2
%conv17.us.us.3 = sext i16 %tmp16 to i32
%mul.us.us.3 = mul nsw i32 %conv17.us.us.3, %conv.us.us.3
%add18.us.us.3 = add nsw i32 %mul.us.us.3, %add18.us.us.2
@@ -95,8 +95,8 @@ for.cond9.for.cond.cleanup11_crit_edge.us.us.unr-lcssa: ; preds = %for.body12.us
br i1 %exitcond98, label %for.cond5.for.cond.cleanup7_crit_edge.us, label %for.cond9.preheader.us.us
for.cond5.for.cond.cleanup7_crit_edge.us: ; preds = %for.cond9.for.cond.cleanup11_crit_edge.us.us
- %arrayidx23.us = getelementptr inbounds i32, i32* %tmp3, i32 %res_x.060.us
- store i32 %add18.us.us.3, i32* %arrayidx23.us, align 4
+ %arrayidx23.us = getelementptr inbounds i32, ptr %tmp3, i32 %res_x.060.us
+ store i32 %add18.us.us.3, ptr %arrayidx23.us, align 4
%add25.us = add nuw i32 %res_x.060.us, 1
%exitcond99 = icmp eq i32 %add25.us, %out_width
br i1 %exitcond99, label %for.cond.cleanup3, label %for.cond9.preheader.us.us.preheader
diff --git a/llvm/test/Transforms/LoopStrengthReduce/addrec-gep-address-space.ll b/llvm/test/Transforms/LoopStrengthReduce/addrec-gep-address-space.ll
index b9670176c15ddc..10ce8735ce9f6c 100644
--- a/llvm/test/Transforms/LoopStrengthReduce/addrec-gep-address-space.ll
+++ b/llvm/test/Transforms/LoopStrengthReduce/addrec-gep-address-space.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3
-; RUN: opt -opaque-pointers=0 < %s -loop-reduce -S | FileCheck %s
+; RUN: opt < %s -loop-reduce -S | FileCheck %s
; This test tests several things. The load and store should use the
; same address instead of having it computed twice, and SCEVExpander should
@@ -10,24 +10,24 @@
target datalayout = "e-p:64:64:64-p1:16:16:16-n16:32:64"
-define void @foo(i64 %n, i64 %m, i64 %o, i64 %q, double addrspace(1)* nocapture %p) nounwind {
+define void @foo(i64 %n, i64 %m, i64 %o, i64 %q, ptr addrspace(1) nocapture %p) nounwind {
; CHECK-LABEL: define void @foo
-; CHECK-SAME: (i64 [[N:%.*]], i64 [[M:%.*]], i64 [[O:%.*]], i64 [[Q:%.*]], double addrspace(1)* nocapture [[P:%.*]]) #[[ATTR0:[0-9]+]] {
+; CHECK-SAME: (i64 [[N:%.*]], i64 [[M:%.*]], i64 [[O:%.*]], i64 [[Q:%.*]], ptr addrspace(1) nocapture [[P:%.*]]) #[[ATTR0:[0-9]+]] {
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP:%.*]] = icmp sgt i64 [[N]], 0
; CHECK-NEXT: br i1 [[TMP]], label [[BB_NPH3:%.*]], label [[RETURN:%.*]]
; CHECK: bb.nph:
; CHECK-NEXT: br label [[BB1:%.*]]
; CHECK: bb1:
-; CHECK-NEXT: [[LSR_IV3:%.*]] = phi double addrspace(1)* [ [[SCEVGEP4:%.*]], [[BB2:%.*]] ], [ [[LSR_IV:%.*]], [[BB_NPH:%.*]] ]
+; CHECK-NEXT: [[LSR_IV2:%.*]] = phi ptr addrspace(1) [ [[SCEVGEP3:%.*]], [[BB2:%.*]] ], [ [[LSR_IV:%.*]], [[BB_NPH:%.*]] ]
; CHECK-NEXT: [[J_01:%.*]] = phi i64 [ [[TMP9:%.*]], [[BB2]] ], [ 0, [[BB_NPH]] ]
-; CHECK-NEXT: [[TMP6:%.*]] = load double, double addrspace(1)* [[LSR_IV3]], align 8
+; CHECK-NEXT: [[TMP6:%.*]] = load double, ptr addrspace(1) [[LSR_IV2]], align 8
; CHECK-NEXT: [[TMP7:%.*]] = fdiv double [[TMP6]], 2.100000e+00
-; CHECK-NEXT: store double [[TMP7]], double addrspace(1)* [[LSR_IV3]], align 8
+; CHECK-NEXT: store double [[TMP7]], ptr addrspace(1) [[LSR_IV2]], align 8
; CHECK-NEXT: [[TMP9]] = add i64 [[J_01]], 1
; CHECK-NEXT: br label [[BB2]]
; CHECK: bb2:
-; CHECK-NEXT: [[SCEVGEP4]] = getelementptr double, double addrspace(1)* [[LSR_IV3]], i16 1
+; CHECK-NEXT: [[SCEVGEP3]] = getelementptr i8, ptr addrspace(1) [[LSR_IV2]], i16 8
; CHECK-NEXT: [[TMP10:%.*]] = icmp slt i64 [[TMP9]], [[M]]
; CHECK-NEXT: br i1 [[TMP10]], label [[BB1]], label [[BB2_BB3_CRIT_EDGE:%.*]]
; CHECK: bb2.bb3_crit_edge:
@@ -36,8 +36,7 @@ define void @foo(i64 %n, i64 %m, i64 %o, i64 %q, double addrspace(1)* nocapture
; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[I_02:%.*]], 1
; CHECK-NEXT: br label [[BB4:%.*]]
; CHECK: bb4:
-; CHECK-NEXT: [[SCEVGEP2:%.*]] = getelementptr i1, i1 addrspace(1)* [[LSR_IV1:%.*]], i16 [[TMP5:%.*]]
-; CHECK-NEXT: [[TMP0:%.*]] = bitcast i1 addrspace(1)* [[SCEVGEP2]] to double addrspace(1)*
+; CHECK-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr addrspace(1) [[LSR_IV]], i16 [[TMP4:%.*]]
; CHECK-NEXT: [[TMP12:%.*]] = icmp slt i64 [[TMP11]], [[N]]
; CHECK-NEXT: br i1 [[TMP12]], label [[BB2_PREHEADER:%.*]], label [[BB4_RETURN_CRIT_EDGE:%.*]]
; CHECK: bb4.return_crit_edge:
@@ -48,17 +47,16 @@ define void @foo(i64 %n, i64 %m, i64 %o, i64 %q, double addrspace(1)* nocapture
; CHECK-NEXT: [[TMP13:%.*]] = icmp sgt i64 [[M]], 0
; CHECK-NEXT: br i1 [[TMP13]], label [[BB_NPH3_SPLIT:%.*]], label [[BB4_RETURN_CRIT_EDGE_SPLIT]]
; CHECK: bb.nph3.split:
-; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr double, double addrspace(1)* [[P]], i16 -2989
-; CHECK-NEXT: [[TMP1:%.*]] = mul i64 [[Q]], [[O]]
-; CHECK-NEXT: [[TMP2:%.*]] = mul i64 [[TMP1]], [[N]]
-; CHECK-NEXT: [[TMP3:%.*]] = mul i64 [[TMP2]], 37
-; CHECK-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP3]] to i16
-; CHECK-NEXT: [[TMP5]] = shl i16 [[TMP4]], 3
+; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr addrspace(1) [[P]], i16 -23912
+; CHECK-NEXT: [[TMP0:%.*]] = mul i64 [[Q]], [[O]]
+; CHECK-NEXT: [[TMP1:%.*]] = mul i64 [[TMP0]], [[N]]
+; CHECK-NEXT: [[TMP2:%.*]] = mul i64 [[TMP1]], 37
+; CHECK-NEXT: [[TMP3:%.*]] = trunc i64 [[TMP2]] to i16
+; CHECK-NEXT: [[TMP4]] = shl i16 [[TMP3]], 3
; CHECK-NEXT: br label [[BB2_PREHEADER]]
; CHECK: bb2.preheader:
-; CHECK-NEXT: [[LSR_IV]] = phi double addrspace(1)* [ [[SCEVGEP]], [[BB_NPH3_SPLIT]] ], [ [[TMP0]], [[BB4]] ]
+; CHECK-NEXT: [[LSR_IV]] = phi ptr addrspace(1) [ [[SCEVGEP]], [[BB_NPH3_SPLIT]] ], [ [[SCEVGEP1]], [[BB4]] ]
; CHECK-NEXT: [[I_02]] = phi i64 [ [[TMP11]], [[BB4]] ], [ 0, [[BB_NPH3_SPLIT]] ]
-; CHECK-NEXT: [[LSR_IV1]] = bitcast double addrspace(1)* [[LSR_IV]] to i1 addrspace(1)*
; CHECK-NEXT: br i1 true, label [[BB_NPH]], label [[BB3]]
; CHECK: return:
; CHECK-NEXT: ret void
@@ -77,12 +75,12 @@ bb1: ; preds = %bb2, %bb.nph
%tmp3 = add i64 %j.01, %tmp1 ; <i64> [#uses=1]
%tmp4 = add i64 %j.01, %tmp2 ; <i64> [#uses=1]
%z0 = add i64 %tmp3, 5203
- %tmp5 = getelementptr double, double addrspace(1)* %p, i64 %z0 ; <double addrspace(1)*> [#uses=1]
- %tmp6 = load double, double addrspace(1)* %tmp5, align 8 ; <double> [#uses=1]
+ %tmp5 = getelementptr double, ptr addrspace(1) %p, i64 %z0 ; <ptr addrspace(1)> [#uses=1]
+ %tmp6 = load double, ptr addrspace(1) %tmp5, align 8 ; <double> [#uses=1]
%tmp7 = fdiv double %tmp6, 2.100000e+00 ; <double> [#uses=1]
%z1 = add i64 %tmp4, 5203
- %tmp8 = getelementptr double, double addrspace(1)* %p, i64 %z1 ; <double addrspace(1)*> [#uses=1]
- store double %tmp7, double addrspace(1)* %tmp8, align 8
+ %tmp8 = getelementptr double, ptr addrspace(1) %p, i64 %z1 ; <ptr addrspace(1)> [#uses=1]
+ store double %tmp7, ptr addrspace(1) %tmp8, align 8
%tmp9 = add i64 %j.01, 1 ; <i64> [#uses=2]
br label %bb2
diff --git a/llvm/test/Transforms/LoopStrengthReduce/addrec-gep.ll b/llvm/test/Transforms/LoopStrengthReduce/addrec-gep.ll
index 9b44d2adb6324e..aba5ff20058ecb 100644
--- a/llvm/test/Transforms/LoopStrengthReduce/addrec-gep.ll
+++ b/llvm/test/Transforms/LoopStrengthReduce/addrec-gep.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3
-; RUN: opt -opaque-pointers=0 < %s -loop-reduce -S | FileCheck %s
+; RUN: opt < %s -loop-reduce -S | FileCheck %s
; This test tests several things. The load and store should use the
; same address instead of having it computed twice, and SCEVExpander should
@@ -10,24 +10,24 @@
target datalayout = "e-p:64:64:64-n32:64"
-define void @foo(i64 %n, i64 %m, i64 %o, i64 %q, double* nocapture %p) nounwind {
+define void @foo(i64 %n, i64 %m, i64 %o, i64 %q, ptr nocapture %p) nounwind {
; CHECK-LABEL: define void @foo
-; CHECK-SAME: (i64 [[N:%.*]], i64 [[M:%.*]], i64 [[O:%.*]], i64 [[Q:%.*]], double* nocapture [[P:%.*]]) #[[ATTR0:[0-9]+]] {
+; CHECK-SAME: (i64 [[N:%.*]], i64 [[M:%.*]], i64 [[O:%.*]], i64 [[Q:%.*]], ptr nocapture [[P:%.*]]) #[[ATTR0:[0-9]+]] {
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP:%.*]] = icmp sgt i64 [[N]], 0
; CHECK-NEXT: br i1 [[TMP]], label [[BB_NPH3:%.*]], label [[RETURN:%.*]]
; CHECK: bb.nph:
; CHECK-NEXT: br label [[BB1:%.*]]
; CHECK: bb1:
-; CHECK-NEXT: [[LSR_IV3:%.*]] = phi double* [ [[SCEVGEP4:%.*]], [[BB2:%.*]] ], [ [[LSR_IV:%.*]], [[BB_NPH:%.*]] ]
+; CHECK-NEXT: [[LSR_IV2:%.*]] = phi ptr [ [[SCEVGEP3:%.*]], [[BB2:%.*]] ], [ [[LSR_IV:%.*]], [[BB_NPH:%.*]] ]
; CHECK-NEXT: [[J_01:%.*]] = phi i64 [ [[TMP9:%.*]], [[BB2]] ], [ 0, [[BB_NPH]] ]
-; CHECK-NEXT: [[TMP6:%.*]] = load double, double* [[LSR_IV3]], align 8
+; CHECK-NEXT: [[TMP6:%.*]] = load double, ptr [[LSR_IV2]], align 8
; CHECK-NEXT: [[TMP7:%.*]] = fdiv double [[TMP6]], 2.100000e+00
-; CHECK-NEXT: store double [[TMP7]], double* [[LSR_IV3]], align 8
+; CHECK-NEXT: store double [[TMP7]], ptr [[LSR_IV2]], align 8
; CHECK-NEXT: [[TMP9]] = add i64 [[J_01]], 1
; CHECK-NEXT: br label [[BB2]]
; CHECK: bb2:
-; CHECK-NEXT: [[SCEVGEP4]] = getelementptr double, double* [[LSR_IV3]], i64 1
+; CHECK-NEXT: [[SCEVGEP3]] = getelementptr i8, ptr [[LSR_IV2]], i64 8
; CHECK-NEXT: [[TMP10:%.*]] = icmp slt i64 [[TMP9]], [[M]]
; CHECK-NEXT: br i1 [[TMP10]], label [[BB1]], label [[BB2_BB3_CRIT_EDGE:%.*]]
; CHECK: bb2.bb3_crit_edge:
@@ -36,8 +36,7 @@ define void @foo(i64 %n, i64 %m, i64 %o, i64 %q, double* nocapture %p) nounwind
; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[I_02:%.*]], 1
; CHECK-NEXT: br label [[BB4:%.*]]
; CHECK: bb4:
-; CHECK-NEXT: [[SCEVGEP2:%.*]] = getelementptr i1, i1* [[LSR_IV1:%.*]], i64 [[TMP3:%.*]]
-; CHECK-NEXT: [[TMP0:%.*]] = bitcast i1* [[SCEVGEP2]] to double*
+; CHECK-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[LSR_IV]], i64 [[TMP2:%.*]]
; CHECK-NEXT: [[TMP12:%.*]] = icmp slt i64 [[TMP11]], [[N]]
; CHECK-NEXT: br i1 [[TMP12]], label [[BB2_PREHEADER:%.*]], label [[BB4_RETURN_CRIT_EDGE:%.*]]
; CHECK: bb4.return_crit_edge:
@@ -48,15 +47,14 @@ define void @foo(i64 %n, i64 %m, i64 %o, i64 %q, double* nocapture %p) nounwind
; CHECK-NEXT: [[TMP13:%.*]] = icmp sgt i64 [[M]], 0
; CHECK-NEXT: br i1 [[TMP13]], label [[BB_NPH3_SPLIT:%.*]], label [[BB4_RETURN_CRIT_EDGE_SPLIT]]
; CHECK: bb.nph3.split:
-; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr double, double* [[P]], i64 5203
-; CHECK-NEXT: [[TMP1:%.*]] = mul i64 [[Q]], [[O]]
-; CHECK-NEXT: [[TMP2:%.*]] = mul i64 [[TMP1]], [[N]]
-; CHECK-NEXT: [[TMP3]] = mul i64 [[TMP2]], 296
+; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[P]], i64 41624
+; CHECK-NEXT: [[TMP0:%.*]] = mul i64 [[Q]], [[O]]
+; CHECK-NEXT: [[TMP1:%.*]] = mul i64 [[TMP0]], [[N]]
+; CHECK-NEXT: [[TMP2]] = mul i64 [[TMP1]], 296
; CHECK-NEXT: br label [[BB2_PREHEADER]]
; CHECK: bb2.preheader:
-; CHECK-NEXT: [[LSR_IV]] = phi double* [ [[SCEVGEP]], [[BB_NPH3_SPLIT]] ], [ [[TMP0]], [[BB4]] ]
+; CHECK-NEXT: [[LSR_IV]] = phi ptr [ [[SCEVGEP]], [[BB_NPH3_SPLIT]] ], [ [[SCEVGEP1]], [[BB4]] ]
; CHECK-NEXT: [[I_02]] = phi i64 [ [[TMP11]], [[BB4]] ], [ 0, [[BB_NPH3_SPLIT]] ]
-; CHECK-NEXT: [[LSR_IV1]] = bitcast double* [[LSR_IV]] to i1*
; CHECK-NEXT: br i1 true, label [[BB_NPH]], label [[BB3]]
; CHECK: return:
; CHECK-NEXT: ret void
@@ -75,12 +73,12 @@ bb1: ; preds = %bb2, %bb.nph
%tmp3 = add i64 %j.01, %tmp1 ; <i64> [#uses=1]
%tmp4 = add i64 %j.01, %tmp2 ; <i64> [#uses=1]
%z0 = add i64 %tmp3, 5203
- %tmp5 = getelementptr double, double* %p, i64 %z0 ; <double*> [#uses=1]
- %tmp6 = load double, double* %tmp5, align 8 ; <double> [#uses=1]
+ %tmp5 = getelementptr double, ptr %p, i64 %z0 ; <ptr> [#uses=1]
+ %tmp6 = load double, ptr %tmp5, align 8 ; <double> [#uses=1]
%tmp7 = fdiv double %tmp6, 2.100000e+00 ; <double> [#uses=1]
%z1 = add i64 %tmp4, 5203
- %tmp8 = getelementptr double, double* %p, i64 %z1 ; <double*> [#uses=1]
- store double %tmp7, double* %tmp8, align 8
+ %tmp8 = getelementptr double, ptr %p, i64 %z1 ; <ptr> [#uses=1]
+ store double %tmp7, ptr %tmp8, align 8
%tmp9 = add i64 %j.01, 1 ; <i64> [#uses=2]
br label %bb2
diff --git a/llvm/test/Transforms/LoopStrengthReduce/illegal-addr-modes.ll b/llvm/test/Transforms/LoopStrengthReduce/illegal-addr-modes.ll
index 6541b961c11c2e..7d7c7efdfa2525 100644
--- a/llvm/test/Transforms/LoopStrengthReduce/illegal-addr-modes.ll
+++ b/llvm/test/Transforms/LoopStrengthReduce/illegal-addr-modes.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3
-; RUN: opt -opaque-pointers=0 < %s -loop-reduce -S | FileCheck %s
+; RUN: opt < %s -loop-reduce -S | FileCheck %s
target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
target triple = "thumbv6m-arm-none-eabi"
@@ -17,45 +17,44 @@ target triple = "thumbv6m-arm-none-eabi"
; Another issue was that LSR got that -1*reg was free for the Thumb1 target.
; Test case 01: -1*reg is not free for the Thumb1 target.
-define i8* @negativeOneCase(i8* returned %a, i8* nocapture readonly %b, i32 %n) nounwind {
-; CHECK-LABEL: define i8* @negativeOneCase
-; CHECK-SAME: (i8* returned [[A:%.*]], i8* nocapture readonly [[B:%.*]], i32 [[N:%.*]]) #[[ATTR0:[0-9]+]] {
+define ptr @negativeOneCase(ptr returned %a, ptr nocapture readonly %b, i32 %n) nounwind {
+; CHECK-LABEL: define ptr @negativeOneCase
+; CHECK-SAME: (ptr returned [[A:%.*]], ptr nocapture readonly [[B:%.*]], i32 [[N:%.*]]) #[[ATTR0:[0-9]+]] {
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, i8* [[A]], i32 -1
+; CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, ptr [[A]], i32 -1
; CHECK-NEXT: br label [[WHILE_COND:%.*]]
; CHECK: while.cond:
-; CHECK-NEXT: [[P_0:%.*]] = phi i8* [ [[ADD_PTR]], [[ENTRY:%.*]] ], [ [[INCDEC_PTR:%.*]], [[WHILE_COND]] ]
-; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, i8* [[P_0]], i32 1
-; CHECK-NEXT: [[SCEVGEP5:%.*]] = getelementptr i8, i8* [[P_0]], i32 1
-; CHECK-NEXT: [[TMP0:%.*]] = load i8, i8* [[SCEVGEP5]], align 1
+; CHECK-NEXT: [[P_0:%.*]] = phi ptr [ [[ADD_PTR]], [[ENTRY:%.*]] ], [ [[INCDEC_PTR:%.*]], [[WHILE_COND]] ]
+; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds i8, ptr [[P_0]], i32 1
+; CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[INCDEC_PTR]], align 1
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[TMP0]], 0
; CHECK-NEXT: br i1 [[CMP]], label [[WHILE_COND2_PREHEADER:%.*]], label [[WHILE_COND]]
; CHECK: while.cond2.preheader:
; CHECK-NEXT: br label [[WHILE_COND2:%.*]]
; CHECK: while.cond2:
; CHECK-NEXT: [[LSR_IV:%.*]] = phi i32 [ [[LSR_IV_NEXT:%.*]], [[WHILE_BODY5:%.*]] ], [ 0, [[WHILE_COND2_PREHEADER]] ]
-; CHECK-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, i8* [[B]], i32 [[LSR_IV]]
-; CHECK-NEXT: [[SCEVGEP3:%.*]] = getelementptr i8, i8* [[INCDEC_PTR]], i32 [[LSR_IV]]
+; CHECK-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[B]], i32 [[LSR_IV]]
+; CHECK-NEXT: [[SCEVGEP2:%.*]] = getelementptr i8, ptr [[INCDEC_PTR]], i32 [[LSR_IV]]
; CHECK-NEXT: [[CMP3:%.*]] = icmp eq i32 [[N]], [[LSR_IV]]
; CHECK-NEXT: br i1 [[CMP3]], label [[WHILE_END8:%.*]], label [[WHILE_BODY5]]
; CHECK: while.body5:
-; CHECK-NEXT: [[TMP1:%.*]] = load i8, i8* [[SCEVGEP1]], align 1
-; CHECK-NEXT: store i8 [[TMP1]], i8* [[SCEVGEP3]], align 1
+; CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr [[SCEVGEP1]], align 1
+; CHECK-NEXT: store i8 [[TMP1]], ptr [[SCEVGEP2]], align 1
; CHECK-NEXT: [[LSR_IV_NEXT]] = add i32 [[LSR_IV]], 1
; CHECK-NEXT: br label [[WHILE_COND2]]
; CHECK: while.end8:
-; CHECK-NEXT: [[SCEVGEP4:%.*]] = getelementptr i8, i8* [[INCDEC_PTR]], i32 [[N]]
-; CHECK-NEXT: store i8 0, i8* [[SCEVGEP4]], align 1
-; CHECK-NEXT: ret i8* [[A]]
+; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[INCDEC_PTR]], i32 [[N]]
+; CHECK-NEXT: store i8 0, ptr [[SCEVGEP]], align 1
+; CHECK-NEXT: ret ptr [[A]]
;
entry:
- %add.ptr = getelementptr inbounds i8, i8* %a, i32 -1
+ %add.ptr = getelementptr inbounds i8, ptr %a, i32 -1
br label %while.cond
while.cond: ; preds = %while.cond, %entry
- %p.0 = phi i8* [ %add.ptr, %entry ], [ %incdec.ptr, %while.cond ]
- %incdec.ptr = getelementptr inbounds i8, i8* %p.0, i32 1
- %0 = load i8, i8* %incdec.ptr, align 1
+ %p.0 = phi ptr [ %add.ptr, %entry ], [ %incdec.ptr, %while.cond ]
+ %incdec.ptr = getelementptr inbounds i8, ptr %p.0, i32 1
+ %0 = load i8, ptr %incdec.ptr, align 1
%cmp = icmp eq i8 %0, 0
br i1 %cmp, label %while.cond2.preheader, label %while.cond
@@ -63,73 +62,66 @@ while.cond2.preheader: ; preds = %while.cond
br label %while.cond2
while.cond2: ; preds = %while.cond2.preheader, %while.body5
- %b.addr.0 = phi i8* [ %incdec.ptr6, %while.body5 ], [ %b, %while.cond2.preheader ]
+ %b.addr.0 = phi ptr [ %incdec.ptr6, %while.body5 ], [ %b, %while.cond2.preheader ]
%n.addr.0 = phi i32 [ %dec, %while.body5 ], [ %n, %while.cond2.preheader ]
- %p.1 = phi i8* [ %incdec.ptr7, %while.body5 ], [ %incdec.ptr, %while.cond2.preheader ]
+ %p.1 = phi ptr [ %incdec.ptr7, %while.body5 ], [ %incdec.ptr, %while.cond2.preheader ]
%cmp3 = icmp eq i32 %n.addr.0, 0
br i1 %cmp3, label %while.end8, label %while.body5
while.body5: ; preds = %while.cond2
%dec = add i32 %n.addr.0, -1
- %incdec.ptr6 = getelementptr inbounds i8, i8* %b.addr.0, i32 1
- %1 = load i8, i8* %b.addr.0, align 1
- %incdec.ptr7 = getelementptr inbounds i8, i8* %p.1, i32 1
- store i8 %1, i8* %p.1, align 1
+ %incdec.ptr6 = getelementptr inbounds i8, ptr %b.addr.0, i32 1
+ %1 = load i8, ptr %b.addr.0, align 1
+ %incdec.ptr7 = getelementptr inbounds i8, ptr %p.1, i32 1
+ store i8 %1, ptr %p.1, align 1
br label %while.cond2
while.end8: ; preds = %while.cond2
- %scevgep = getelementptr i8, i8* %incdec.ptr, i32 %n
- store i8 0, i8* %scevgep, align 1
- ret i8* %a
+ %scevgep = getelementptr i8, ptr %incdec.ptr, i32 %n
+ store i8 0, ptr %scevgep, align 1
+ ret ptr %a
}
; Test case 02: 4*reg({0,+,-1}) and -4*reg({0,+,-1}) are not supported for
; the Thumb1 target.
-define void @negativeFourCase(i8* %ptr1, i32* %ptr2) nounwind {
+define void @negativeFourCase(ptr %ptr1, ptr %ptr2) nounwind {
; CHECK-LABEL: define void @negativeFourCase
-; CHECK-SAME: (i8* [[PTR1:%.*]], i32* [[PTR2:%.*]]) #[[ATTR0]] {
+; CHECK-SAME: (ptr [[PTR1:%.*]], ptr [[PTR2:%.*]]) #[[ATTR0]] {
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[FOR_COND6_PREHEADER_US_I_I:%.*]]
; CHECK: for.cond6.preheader.us.i.i:
-; CHECK-NEXT: [[ADDR_0108_US_I_I:%.*]] = phi i8* [ [[SCEVGEP_I_I:%.*]], [[IF_END48_US_I_I:%.*]] ], [ [[PTR1]], [[ENTRY:%.*]] ]
+; CHECK-NEXT: [[ADDR_0108_US_I_I:%.*]] = phi ptr [ [[SCEVGEP_I_I:%.*]], [[IF_END48_US_I_I:%.*]] ], [ [[PTR1]], [[ENTRY:%.*]] ]
; CHECK-NEXT: [[INC49_US_I_I:%.*]] = phi i32 [ [[INC50_US_I_I:%.*]], [[IF_END48_US_I_I]] ], [ 0, [[ENTRY]] ]
-; CHECK-NEXT: [[C1_0104_US_I_I:%.*]] = phi i32* [ [[C0_0103_US_I_I:%.*]], [[IF_END48_US_I_I]] ], [ [[PTR2]], [[ENTRY]] ]
-; CHECK-NEXT: [[C0_0103_US_I_I]] = phi i32* [ [[C1_0104_US_I_I]], [[IF_END48_US_I_I]] ], [ [[PTR2]], [[ENTRY]] ]
-; CHECK-NEXT: [[C0_0103_US_I_I1:%.*]] = bitcast i32* [[C0_0103_US_I_I]] to i8*
-; CHECK-NEXT: [[SCEVGEP3:%.*]] = getelementptr i32, i32* [[C1_0104_US_I_I]], i32 -1
-; CHECK-NEXT: [[SCEVGEP34:%.*]] = bitcast i32* [[SCEVGEP3]] to i8*
-; CHECK-NEXT: [[C1_0104_US_I_I7:%.*]] = bitcast i32* [[C1_0104_US_I_I]] to i8*
+; CHECK-NEXT: [[C1_0104_US_I_I:%.*]] = phi ptr [ [[C0_0103_US_I_I:%.*]], [[IF_END48_US_I_I]] ], [ [[PTR2]], [[ENTRY]] ]
+; CHECK-NEXT: [[C0_0103_US_I_I]] = phi ptr [ [[C1_0104_US_I_I]], [[IF_END48_US_I_I]] ], [ [[PTR2]], [[ENTRY]] ]
+; CHECK-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[C1_0104_US_I_I]], i32 -4
; CHECK-NEXT: br label [[FOR_BODY8_US_I_I:%.*]]
; CHECK: if.end48.us.i.i:
-; CHECK-NEXT: [[SCEVGEP_I_I]] = getelementptr i8, i8* [[ADDR_0108_US_I_I]], i32 256
+; CHECK-NEXT: [[SCEVGEP_I_I]] = getelementptr i8, ptr [[ADDR_0108_US_I_I]], i32 256
; CHECK-NEXT: [[INC50_US_I_I]] = add nuw nsw i32 [[INC49_US_I_I]], 1
; CHECK-NEXT: [[EXITCOND110_I_I:%.*]] = icmp eq i32 [[INC50_US_I_I]], 256
; CHECK-NEXT: br i1 [[EXITCOND110_I_I]], label [[EXIT_I:%.*]], label [[FOR_COND6_PREHEADER_US_I_I]]
; CHECK: for.body8.us.i.i:
; CHECK-NEXT: [[LSR_IV:%.*]] = phi i32 [ [[LSR_IV_NEXT:%.*]], [[FOR_INC_US_I_I:%.*]] ], [ 0, [[FOR_COND6_PREHEADER_US_I_I]] ]
-; CHECK-NEXT: [[ADDR_198_US_I_I:%.*]] = phi i8* [ [[ADDR_0108_US_I_I]], [[FOR_COND6_PREHEADER_US_I_I]] ], [ [[INCDEC_PTR_US_I_I:%.*]], [[FOR_INC_US_I_I]] ]
+; CHECK-NEXT: [[ADDR_198_US_I_I:%.*]] = phi ptr [ [[ADDR_0108_US_I_I]], [[FOR_COND6_PREHEADER_US_I_I]] ], [ [[INCDEC_PTR_US_I_I:%.*]], [[FOR_INC_US_I_I]] ]
; CHECK-NEXT: [[INC_196_US_I_I:%.*]] = phi i32 [ 0, [[FOR_COND6_PREHEADER_US_I_I]] ], [ [[INC_2_US_I_I:%.*]], [[FOR_INC_US_I_I]] ]
-; CHECK-NEXT: [[INCDEC_PTR_US_I_I]] = getelementptr inbounds i8, i8* [[ADDR_198_US_I_I]], i32 1
-; CHECK-NEXT: [[TMP0:%.*]] = load i8, i8* [[ADDR_198_US_I_I]], align 1
+; CHECK-NEXT: [[INCDEC_PTR_US_I_I]] = getelementptr inbounds i8, ptr [[ADDR_198_US_I_I]], i32 1
+; CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[ADDR_198_US_I_I]], align 1
; CHECK-NEXT: [[CMP9_US_I_I:%.*]] = icmp eq i8 [[TMP0]], -1
; CHECK-NEXT: br i1 [[CMP9_US_I_I]], label [[IF_END37_US_I_I:%.*]], label [[IF_ELSE_US_I_I:%.*]]
; CHECK: if.else.us.i.i:
-; CHECK-NEXT: [[SCEVGEP10:%.*]] = getelementptr i8, i8* [[C1_0104_US_I_I7]], i32 [[LSR_IV]]
-; CHECK-NEXT: [[SCEVGEP1011:%.*]] = bitcast i8* [[SCEVGEP10]] to i32*
-; CHECK-NEXT: [[SCEVGEP12:%.*]] = getelementptr i32, i32* [[SCEVGEP1011]], i32 1
-; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[SCEVGEP12]], align 4
-; CHECK-NEXT: [[SCEVGEP8:%.*]] = getelementptr i8, i8* [[C1_0104_US_I_I7]], i32 [[LSR_IV]]
-; CHECK-NEXT: [[SCEVGEP89:%.*]] = bitcast i8* [[SCEVGEP8]] to i32*
-; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[SCEVGEP89]], align 4
-; CHECK-NEXT: [[SCEVGEP5:%.*]] = getelementptr i8, i8* [[SCEVGEP34]], i32 [[LSR_IV]]
-; CHECK-NEXT: [[SCEVGEP56:%.*]] = bitcast i8* [[SCEVGEP5]] to i32*
-; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[SCEVGEP56]], align 4
+; CHECK-NEXT: [[SCEVGEP4:%.*]] = getelementptr i8, ptr [[C1_0104_US_I_I]], i32 [[LSR_IV]]
+; CHECK-NEXT: [[SCEVGEP5:%.*]] = getelementptr i8, ptr [[SCEVGEP4]], i32 4
+; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[SCEVGEP5]], align 4
+; CHECK-NEXT: [[SCEVGEP3:%.*]] = getelementptr i8, ptr [[C1_0104_US_I_I]], i32 [[LSR_IV]]
+; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[SCEVGEP3]], align 4
+; CHECK-NEXT: [[SCEVGEP2:%.*]] = getelementptr i8, ptr [[SCEVGEP1]], i32 [[LSR_IV]]
+; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[SCEVGEP2]], align 4
; CHECK-NEXT: br label [[IF_END37_US_I_I]]
; CHECK: if.end37.us.i.i:
; CHECK-NEXT: [[TMP4:%.*]] = phi i32 [ [[TMP3]], [[IF_ELSE_US_I_I]] ], [ 0, [[FOR_BODY8_US_I_I]] ]
-; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, i8* [[C0_0103_US_I_I1]], i32 [[LSR_IV]]
-; CHECK-NEXT: [[SCEVGEP2:%.*]] = bitcast i8* [[SCEVGEP]] to i32*
-; CHECK-NEXT: store i32 [[TMP4]], i32* [[SCEVGEP2]], align 4
+; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[C0_0103_US_I_I]], i32 [[LSR_IV]]
+; CHECK-NEXT: store i32 [[TMP4]], ptr [[SCEVGEP]], align 4
; CHECK-NEXT: [[INC_US_I_I:%.*]] = add nsw i32 [[INC_196_US_I_I]], 1
; CHECK-NEXT: [[CMP38_US_I_I:%.*]] = icmp sgt i32 [[INC_196_US_I_I]], 6
; CHECK-NEXT: br i1 [[CMP38_US_I_I]], label [[IF_THEN40_US_I_I:%.*]], label [[FOR_INC_US_I_I]]
@@ -147,42 +139,42 @@ entry:
br label %for.cond6.preheader.us.i.i
for.cond6.preheader.us.i.i: ; preds = %if.end48.us.i.i, %entry
- %addr.0108.us.i.i = phi i8* [ %scevgep.i.i, %if.end48.us.i.i ], [ %ptr1, %entry ]
+ %addr.0108.us.i.i = phi ptr [ %scevgep.i.i, %if.end48.us.i.i ], [ %ptr1, %entry ]
%inc49.us.i.i = phi i32 [ %inc50.us.i.i, %if.end48.us.i.i ], [ 0, %entry ]
- %c1.0104.us.i.i = phi i32* [ %c0.0103.us.i.i, %if.end48.us.i.i ], [ %ptr2, %entry ]
- %c0.0103.us.i.i = phi i32* [ %c1.0104.us.i.i, %if.end48.us.i.i ], [ %ptr2, %entry ]
+ %c1.0104.us.i.i = phi ptr [ %c0.0103.us.i.i, %if.end48.us.i.i ], [ %ptr2, %entry ]
+ %c0.0103.us.i.i = phi ptr [ %c1.0104.us.i.i, %if.end48.us.i.i ], [ %ptr2, %entry ]
br label %for.body8.us.i.i
if.end48.us.i.i: ; preds = %for.inc.us.i.i
- %scevgep.i.i = getelementptr i8, i8* %addr.0108.us.i.i, i32 256
+ %scevgep.i.i = getelementptr i8, ptr %addr.0108.us.i.i, i32 256
%inc50.us.i.i = add nuw nsw i32 %inc49.us.i.i, 1
%exitcond110.i.i = icmp eq i32 %inc50.us.i.i, 256
br i1 %exitcond110.i.i, label %exit.i, label %for.cond6.preheader.us.i.i
for.body8.us.i.i: ; preds = %for.inc.us.i.i, %for.cond6.preheader.us.i.i
- %addr.198.us.i.i = phi i8* [ %addr.0108.us.i.i, %for.cond6.preheader.us.i.i ], [ %incdec.ptr.us.i.i, %for.inc.us.i.i ]
+ %addr.198.us.i.i = phi ptr [ %addr.0108.us.i.i, %for.cond6.preheader.us.i.i ], [ %incdec.ptr.us.i.i, %for.inc.us.i.i ]
%inc.196.us.i.i = phi i32 [ 0, %for.cond6.preheader.us.i.i ], [ %inc.2.us.i.i, %for.inc.us.i.i ]
%c.093.us.i.i = phi i32 [ 0, %for.cond6.preheader.us.i.i ], [ %inc43.us.i.i, %for.inc.us.i.i ]
- %incdec.ptr.us.i.i = getelementptr inbounds i8, i8* %addr.198.us.i.i, i32 1
- %0 = load i8, i8* %addr.198.us.i.i, align 1
+ %incdec.ptr.us.i.i = getelementptr inbounds i8, ptr %addr.198.us.i.i, i32 1
+ %0 = load i8, ptr %addr.198.us.i.i, align 1
%cmp9.us.i.i = icmp eq i8 %0, -1
br i1 %cmp9.us.i.i, label %if.end37.us.i.i, label %if.else.us.i.i
if.else.us.i.i: ; preds = %for.body8.us.i.i
%add12.us.i.i = add nuw nsw i32 %c.093.us.i.i, 1
- %arrayidx13.us.i.i = getelementptr inbounds i32, i32* %c1.0104.us.i.i, i32 %add12.us.i.i
- %1 = load i32, i32* %arrayidx13.us.i.i, align 4
- %arrayidx16.us.i.i = getelementptr inbounds i32, i32* %c1.0104.us.i.i, i32 %c.093.us.i.i
- %2 = load i32, i32* %arrayidx16.us.i.i, align 4
+ %arrayidx13.us.i.i = getelementptr inbounds i32, ptr %c1.0104.us.i.i, i32 %add12.us.i.i
+ %1 = load i32, ptr %arrayidx13.us.i.i, align 4
+ %arrayidx16.us.i.i = getelementptr inbounds i32, ptr %c1.0104.us.i.i, i32 %c.093.us.i.i
+ %2 = load i32, ptr %arrayidx16.us.i.i, align 4
%sub19.us.i.i = add nsw i32 %c.093.us.i.i, -1
- %arrayidx20.us.i.i = getelementptr inbounds i32, i32* %c1.0104.us.i.i, i32 %sub19.us.i.i
- %3 = load i32, i32* %arrayidx20.us.i.i, align 4
+ %arrayidx20.us.i.i = getelementptr inbounds i32, ptr %c1.0104.us.i.i, i32 %sub19.us.i.i
+ %3 = load i32, ptr %arrayidx20.us.i.i, align 4
br label %if.end37.us.i.i
if.end37.us.i.i: ; preds = %if.else.us.i.i, %for.body8.us.i.i
%4 = phi i32 [ %3, %if.else.us.i.i ], [ 0, %for.body8.us.i.i ]
- %arrayidx36.us.i.i = getelementptr inbounds i32, i32* %c0.0103.us.i.i, i32 %c.093.us.i.i
- store i32 %4, i32* %arrayidx36.us.i.i, align 4
+ %arrayidx36.us.i.i = getelementptr inbounds i32, ptr %c0.0103.us.i.i, i32 %c.093.us.i.i
+ store i32 %4, ptr %arrayidx36.us.i.i, align 4
%inc.us.i.i = add nsw i32 %inc.196.us.i.i, 1
%cmp38.us.i.i = icmp sgt i32 %inc.196.us.i.i, 6
br i1 %cmp38.us.i.i, label %if.then40.us.i.i, label %for.inc.us.i.i
diff --git a/llvm/test/Transforms/LoopStrengthReduce/missing-phi-operand-update.ll b/llvm/test/Transforms/LoopStrengthReduce/missing-phi-operand-update.ll
index ac47e4ee47dfb8..83f30ad33431e2 100644
--- a/llvm/test/Transforms/LoopStrengthReduce/missing-phi-operand-update.ll
+++ b/llvm/test/Transforms/LoopStrengthReduce/missing-phi-operand-update.ll
@@ -2,7 +2,7 @@
; PR41445: This test checks the case when LSR split critical edge
; and phi node has other pending fixup operands
-; RUN: opt -opaque-pointers=0 -S -loop-reduce < %s | FileCheck %s
+; RUN: opt -S -loop-reduce < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@@ -12,9 +12,9 @@ target triple = "x86_64-unknown-linux-gnu"
; When we try to rewrite %tmp1, we first split the critical edge.
; All the other PHI inputs besides %tmp1 go to a new phi node.
; This test checks that LSR is still able to rewrite %tmp2, %tmp3, %tmp4.
-define i32 @foo(i32* %A, i32 %t) {
+define i32 @foo(ptr %A, i32 %t) {
; CHECK-LABEL: define i32 @foo
-; CHECK-SAME: (i32* [[A:%.*]], i32 [[T:%.*]]) {
+; CHECK-SAME: (ptr [[A:%.*]], i32 [[T:%.*]]) {
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[LOOP_32:%.*]]
; CHECK: loop.exit.loopexitsplitsplitsplit:
@@ -50,36 +50,41 @@ define i32 @foo(i32* %A, i32 %t) {
; CHECK: loop.32:
; CHECK-NEXT: [[LSR_IV]] = phi i64 [ [[LSR_IV_NEXT:%.*]], [[IFMERGE_46:%.*]] ], [ 2, [[ENTRY:%.*]] ]
; CHECK-NEXT: [[I1_I64_0:%.*]] = phi i64 [ 0, [[ENTRY]] ], [ [[NEXTIVLOOP_32:%.*]], [[IFMERGE_46]] ]
-; CHECK-NEXT: [[SCEVGEP7:%.*]] = getelementptr i32, i32* [[A]], i64 [[LSR_IV]]
-; CHECK-NEXT: [[SCEVGEP8:%.*]] = getelementptr i32, i32* [[SCEVGEP7]], i64 -1
-; CHECK-NEXT: [[GEPLOAD:%.*]] = load i32, i32* [[SCEVGEP8]], align 4
+; CHECK-NEXT: [[TMP3:%.*]] = shl nuw nsw i64 [[LSR_IV]], 2
+; CHECK-NEXT: [[SCEVGEP7:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP3]]
+; CHECK-NEXT: [[SCEVGEP8:%.*]] = getelementptr i8, ptr [[SCEVGEP7]], i64 -4
+; CHECK-NEXT: [[GEPLOAD:%.*]] = load i32, ptr [[SCEVGEP8]], align 4
; CHECK-NEXT: [[CMP_34:%.*]] = icmp sgt i32 [[GEPLOAD]], [[T]]
; CHECK-NEXT: br i1 [[CMP_34]], label [[THEN_34]], label [[IFMERGE_34:%.*]]
; CHECK: then.34:
-; CHECK-NEXT: [[SCEVGEP5:%.*]] = getelementptr i32, i32* [[A]], i64 [[LSR_IV]]
-; CHECK-NEXT: [[SCEVGEP6:%.*]] = getelementptr i32, i32* [[SCEVGEP5]], i64 -2
-; CHECK-NEXT: [[GEPLOAD18:%.*]] = load i32, i32* [[SCEVGEP6]], align 4
+; CHECK-NEXT: [[TMP4:%.*]] = shl nuw nsw i64 [[LSR_IV]], 2
+; CHECK-NEXT: [[SCEVGEP5:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP4]]
+; CHECK-NEXT: [[SCEVGEP6:%.*]] = getelementptr i8, ptr [[SCEVGEP5]], i64 -8
+; CHECK-NEXT: [[GEPLOAD18:%.*]] = load i32, ptr [[SCEVGEP6]], align 4
; CHECK-NEXT: [[CMP_35:%.*]] = icmp slt i32 [[GEPLOAD18]], [[T]]
; CHECK-NEXT: br i1 [[CMP_35]], label [[THEN_34_LOOP_EXIT_LOOPEXIT_CRIT_EDGE]], label [[IFMERGE_34]]
; CHECK: ifmerge.34:
-; CHECK-NEXT: [[SCEVGEP4:%.*]] = getelementptr i32, i32* [[A]], i64 [[LSR_IV]]
-; CHECK-NEXT: [[GEPLOAD20:%.*]] = load i32, i32* [[SCEVGEP4]], align 4
+; CHECK-NEXT: [[TMP5:%.*]] = shl nuw nsw i64 [[LSR_IV]], 2
+; CHECK-NEXT: [[SCEVGEP4:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP5]]
+; CHECK-NEXT: [[GEPLOAD20:%.*]] = load i32, ptr [[SCEVGEP4]], align 4
; CHECK-NEXT: [[CMP_38:%.*]] = icmp sgt i32 [[GEPLOAD20]], [[T]]
; CHECK-NEXT: [[CMP_39:%.*]] = icmp slt i32 [[GEPLOAD]], [[T]]
; CHECK-NEXT: [[OR_COND:%.*]] = and i1 [[CMP_38]], [[CMP_39]]
; CHECK-NEXT: br i1 [[OR_COND]], label [[LOOP_EXIT_LOOPEXITSPLITSPLITSPLIT]], label [[IFMERGE_38]]
; CHECK: ifmerge.38:
-; CHECK-NEXT: [[SCEVGEP2:%.*]] = getelementptr i32, i32* [[A]], i64 [[LSR_IV]]
-; CHECK-NEXT: [[SCEVGEP3:%.*]] = getelementptr i32, i32* [[SCEVGEP2]], i64 1
-; CHECK-NEXT: [[GEPLOAD24:%.*]] = load i32, i32* [[SCEVGEP3]], align 4
+; CHECK-NEXT: [[TMP6:%.*]] = shl nuw nsw i64 [[LSR_IV]], 2
+; CHECK-NEXT: [[SCEVGEP2:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP6]]
+; CHECK-NEXT: [[SCEVGEP3:%.*]] = getelementptr i8, ptr [[SCEVGEP2]], i64 4
+; CHECK-NEXT: [[GEPLOAD24:%.*]] = load i32, ptr [[SCEVGEP3]], align 4
; CHECK-NEXT: [[CMP_42:%.*]] = icmp sgt i32 [[GEPLOAD24]], [[T]]
; CHECK-NEXT: [[CMP_43:%.*]] = icmp slt i32 [[GEPLOAD20]], [[T]]
; CHECK-NEXT: [[OR_COND55:%.*]] = and i1 [[CMP_42]], [[CMP_43]]
; CHECK-NEXT: br i1 [[OR_COND55]], label [[IFMERGE_38_LOOP_EXIT_LOOPEXITSPLITSPLIT_CRIT_EDGE]], label [[IFMERGE_42]]
; CHECK: ifmerge.42:
-; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i32, i32* [[A]], i64 [[LSR_IV]]
-; CHECK-NEXT: [[SCEVGEP1:%.*]] = getelementptr i32, i32* [[SCEVGEP]], i64 2
-; CHECK-NEXT: [[GEPLOAD28:%.*]] = load i32, i32* [[SCEVGEP1]], align 4
+; CHECK-NEXT: [[TMP7:%.*]] = shl nuw nsw i64 [[LSR_IV]], 2
+; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[A]], i64 [[TMP7]]
+; CHECK-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[SCEVGEP]], i64 8
+; CHECK-NEXT: [[GEPLOAD28:%.*]] = load i32, ptr [[SCEVGEP1]], align 4
; CHECK-NEXT: [[CMP_46:%.*]] = icmp sgt i32 [[GEPLOAD28]], [[T]]
; CHECK-NEXT: [[CMP_47:%.*]] = icmp slt i32 [[GEPLOAD24]], [[T]]
; CHECK-NEXT: [[OR_COND56:%.*]] = and i1 [[CMP_46]], [[CMP_47]]
@@ -90,23 +95,23 @@ define i32 @foo(i32* %A, i32 %t) {
; CHECK-NEXT: [[CONDLOOP_32:%.*]] = icmp ult i64 [[NEXTIVLOOP_32]], 12
; CHECK-NEXT: br i1 [[CONDLOOP_32]], label [[LOOP_32]], label [[LOOP_25:%.*]]
; CHECK: loop.25:
-; CHECK-NEXT: [[ARRAYIDX31:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 49
-; CHECK-NEXT: [[GEPLOAD32:%.*]] = load i32, i32* [[ARRAYIDX31]], align 4
+; CHECK-NEXT: [[ARRAYIDX31:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 49
+; CHECK-NEXT: [[GEPLOAD32:%.*]] = load i32, ptr [[ARRAYIDX31]], align 4
; CHECK-NEXT: [[CMP_8:%.*]] = icmp sgt i32 [[GEPLOAD32]], [[T]]
; CHECK-NEXT: br i1 [[CMP_8]], label [[THEN_8]], label [[IFMERGE_8]]
; CHECK: then.8:
-; CHECK-NEXT: [[ARRAYIDX33:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 48
-; CHECK-NEXT: [[GEPLOAD34:%.*]] = load i32, i32* [[ARRAYIDX33]], align 4
+; CHECK-NEXT: [[ARRAYIDX33:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 48
+; CHECK-NEXT: [[GEPLOAD34:%.*]] = load i32, ptr [[ARRAYIDX33]], align 4
; CHECK-NEXT: [[CMP_15:%.*]] = icmp slt i32 [[GEPLOAD34]], [[T]]
; CHECK-NEXT: br i1 [[CMP_15]], label [[LOOP_EXIT]], label [[IFMERGE_8]]
; CHECK: ifmerge.8:
-; CHECK-NEXT: [[ARRAYIDX31_1:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 50
-; CHECK-NEXT: [[GEPLOAD32_1:%.*]] = load i32, i32* [[ARRAYIDX31_1]], align 4
+; CHECK-NEXT: [[ARRAYIDX31_1:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 50
+; CHECK-NEXT: [[GEPLOAD32_1:%.*]] = load i32, ptr [[ARRAYIDX31_1]], align 4
; CHECK-NEXT: [[CMP_8_1:%.*]] = icmp sgt i32 [[GEPLOAD32_1]], [[T]]
; CHECK-NEXT: br i1 [[CMP_8_1]], label [[THEN_8_1]], label [[FOR_END]]
; CHECK: then.8.1:
-; CHECK-NEXT: [[ARRAYIDX33_1:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 49
-; CHECK-NEXT: [[GEPLOAD34_1:%.*]] = load i32, i32* [[ARRAYIDX33_1]], align 4
+; CHECK-NEXT: [[ARRAYIDX33_1:%.*]] = getelementptr inbounds i32, ptr [[A]], i64 49
+; CHECK-NEXT: [[GEPLOAD34_1:%.*]] = load i32, ptr [[ARRAYIDX33_1]], align 4
; CHECK-NEXT: [[CMP_15_1:%.*]] = icmp slt i32 [[GEPLOAD34_1]], [[T]]
; CHECK-NEXT: br i1 [[CMP_15_1]], label [[LOOP_EXIT]], label [[FOR_END]]
;
@@ -127,21 +132,21 @@ loop.32: ; preds = %ifmerge.46, %entry
%i1.i64.0 = phi i64 [ 0, %entry ], [ %nextivloop.32, %ifmerge.46 ]
%tmp1 = shl i64 %i1.i64.0, 2
%tmp2 = or i64 %tmp1, 1
- %arrayIdx = getelementptr inbounds i32, i32* %A, i64 %tmp2
- %gepload = load i32, i32* %arrayIdx, align 4
+ %arrayIdx = getelementptr inbounds i32, ptr %A, i64 %tmp2
+ %gepload = load i32, ptr %arrayIdx, align 4
%cmp.34 = icmp sgt i32 %gepload, %t
br i1 %cmp.34, label %then.34, label %ifmerge.34
then.34: ; preds = %loop.32
- %arrayIdx17 = getelementptr inbounds i32, i32* %A, i64 %tmp1
- %gepload18 = load i32, i32* %arrayIdx17, align 4
+ %arrayIdx17 = getelementptr inbounds i32, ptr %A, i64 %tmp1
+ %gepload18 = load i32, ptr %arrayIdx17, align 4
%cmp.35 = icmp slt i32 %gepload18, %t
br i1 %cmp.35, label %loop.exit, label %ifmerge.34
ifmerge.34: ; preds = %then.34, %loop.32
%tmp3 = or i64 %tmp1, 2
- %arrayIdx19 = getelementptr inbounds i32, i32* %A, i64 %tmp3
- %gepload20 = load i32, i32* %arrayIdx19, align 4
+ %arrayIdx19 = getelementptr inbounds i32, ptr %A, i64 %tmp3
+ %gepload20 = load i32, ptr %arrayIdx19, align 4
%cmp.38 = icmp sgt i32 %gepload20, %t
%cmp.39 = icmp slt i32 %gepload, %t
%or.cond = and i1 %cmp.38, %cmp.39
@@ -149,8 +154,8 @@ ifmerge.34: ; preds = %then.34, %loop.32
ifmerge.38: ; preds = %ifmerge.34
%tmp4 = or i64 %tmp1, 3
- %arrayIdx23 = getelementptr inbounds i32, i32* %A, i64 %tmp4
- %gepload24 = load i32, i32* %arrayIdx23, align 4
+ %arrayIdx23 = getelementptr inbounds i32, ptr %A, i64 %tmp4
+ %gepload24 = load i32, ptr %arrayIdx23, align 4
%cmp.42 = icmp sgt i32 %gepload24, %t
%cmp.43 = icmp slt i32 %gepload20, %t
%or.cond55 = and i1 %cmp.42, %cmp.43
@@ -158,8 +163,8 @@ ifmerge.38: ; preds = %ifmerge.34
ifmerge.42: ; preds = %ifmerge.38
%tmp5 = add i64 %tmp1, 4
- %arrayIdx27 = getelementptr inbounds i32, i32* %A, i64 %tmp5
- %gepload28 = load i32, i32* %arrayIdx27, align 4
+ %arrayIdx27 = getelementptr inbounds i32, ptr %A, i64 %tmp5
+ %gepload28 = load i32, ptr %arrayIdx27, align 4
%cmp.46 = icmp sgt i32 %gepload28, %t
%cmp.47 = icmp slt i32 %gepload24, %t
%or.cond56 = and i1 %cmp.46, %cmp.47
@@ -171,26 +176,26 @@ ifmerge.46: ; preds = %ifmerge.42
br i1 %condloop.32, label %loop.32, label %loop.25
loop.25: ; preds = %ifmerge.46
- %arrayIdx31 = getelementptr inbounds i32, i32* %A, i64 49
- %gepload32 = load i32, i32* %arrayIdx31, align 4
+ %arrayIdx31 = getelementptr inbounds i32, ptr %A, i64 49
+ %gepload32 = load i32, ptr %arrayIdx31, align 4
%cmp.8 = icmp sgt i32 %gepload32, %t
br i1 %cmp.8, label %then.8, label %ifmerge.8
then.8: ; preds = %loop.25
- %arrayIdx33 = getelementptr inbounds i32, i32* %A, i64 48
- %gepload34 = load i32, i32* %arrayIdx33, align 4
+ %arrayIdx33 = getelementptr inbounds i32, ptr %A, i64 48
+ %gepload34 = load i32, ptr %arrayIdx33, align 4
%cmp.15 = icmp slt i32 %gepload34, %t
br i1 %cmp.15, label %loop.exit, label %ifmerge.8
ifmerge.8: ; preds = %then.8, %loop.25
- %arrayIdx31.1 = getelementptr inbounds i32, i32* %A, i64 50
- %gepload32.1 = load i32, i32* %arrayIdx31.1, align 4
+ %arrayIdx31.1 = getelementptr inbounds i32, ptr %A, i64 50
+ %gepload32.1 = load i32, ptr %arrayIdx31.1, align 4
%cmp.8.1 = icmp sgt i32 %gepload32.1, %t
br i1 %cmp.8.1, label %then.8.1, label %for.end
then.8.1: ; preds = %ifmerge.8
- %arrayIdx33.1 = getelementptr inbounds i32, i32* %A, i64 49
- %gepload34.1 = load i32, i32* %arrayIdx33.1, align 4
+ %arrayIdx33.1 = getelementptr inbounds i32, ptr %A, i64 49
+ %gepload34.1 = load i32, ptr %arrayIdx33.1, align 4
%cmp.15.1 = icmp slt i32 %gepload34.1, %t
br i1 %cmp.15.1, label %loop.exit, label %for.end
}
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