[PATCH] D153099: [SPIR-V] Begin removing explicit setRegClass calls
Aleksandr Bezzubikov via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 11 23:38:11 PDT 2023
zuban32 added a subscriber: arsenm.
zuban32 added inline comments.
================
Comment at: llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp:321-322
+ const auto &ST = GR->CurMF->getSubtarget();
+ constrainSelectedInstRegOperands(*B.getInstr(), *ST.getInstrInfo(),
+ *ST.getRegisterInfo(), *ST.getRegBankInfo());
----------------
iliya-diyachkov wrote:
> `constrainSelectedInstRegOperands` should be called from InstructionSelector only. We also have it in methods of SPIRVGlobalRegistry but these methods are called from InstructionSelector.
This is the whole point of the patch - these instructions are built before selection, but we need to have them constrained in order to support selection of instruction that depend on them (like G_ADD adding two OpFunctionParameter's). Using setRegClass explicitly is wrong since these classes are already described by the instruction description in tablegen. I remember @arsenm pointed out the problem a while ago.
@iliya-diyachkov do you see any particular issue with calling these funcs from here? I see there're a couple of non-selector uses in AMDGPU RegBankSelect and MIPS legalizer. Anyway, I don't see any viable alternative.
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https://reviews.llvm.org/D153099/new/
https://reviews.llvm.org/D153099
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