[PATCH] D153761: [AMDGPU] ISel for @llvm.amdgcn.cs.chain intrinsic (WIP)
Nicolai Hähnle via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 11 20:45:36 PDT 2023
nhaehnle added a comment.
It would be nice to have a simple test case that shows the final assembly.
================
Comment at: llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp:7401
+ Args[0].IsInReg = true; // Make sure these go in the SGPRs.
+ assert(!Args[1].IsInReg && "VGPR args should not be marked inreg");
+
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foad wrote:
> Is this something you could check in the IR verifier? Failing an assertion here is not a nice diagnostic.
Could also make this a report_fatal_error
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D153761/new/
https://reviews.llvm.org/D153761
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