[llvm] db8b624 - [X86][FP16] Fix mis-combination from FMULC to FCMULC

[Phoebe Wang via llvm-commits]

Author: Phoebe Wang
Date: 2023-07-11T22:26:20+08:00
New Revision: db8b624de172f6f1f62b2559f54f86adb8799e6e

URL: https://github.com/llvm/llvm-project/commit/db8b624de172f6f1f62b2559f54f86adb8799e6e
DIFF: https://github.com/llvm/llvm-project/commit/db8b624de172f6f1f62b2559f54f86adb8799e6e.diff

LOG: [X86][FP16] Fix mis-combination from FMULC to FCMULC

The combination was designed to combine a negative imaginary value
rather then a full negative complex value.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D154213

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86ISelLowering.cpp
    llvm/test/CodeGen/X86/avx512fp16-combine-xor-vfmulc.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 2d6f660b17e9ab..88478ce0874e0f 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -52991,7 +52991,7 @@ static SDValue combineFMulcFCMulc(SDNode *N, SelectionDAG &DAG,
       }
     }
     if (const auto *CF = dyn_cast<ConstantFP>(c))
-      return CF->isNegativeZeroValue();
+      return CF->getType()->isFloatTy() && CF->isNegativeZeroValue();
     return false;
   };
   auto combineConjugation = [&](SDValue &r) {

diff  --git a/llvm/test/CodeGen/X86/avx512fp16-combine-xor-vfmulc.ll b/llvm/test/CodeGen/X86/avx512fp16-combine-xor-vfmulc.ll
index a63948169b84a0..946029ae921c0c 100644
--- a/llvm/test/CodeGen/X86/avx512fp16-combine-xor-vfmulc.ll
+++ b/llvm/test/CodeGen/X86/avx512fp16-combine-xor-vfmulc.ll
@@ -69,8 +69,10 @@ entry:
 define dso_local <32 x half> @test5(<32 x half> noundef %a, <32 x half> noundef %b) local_unnamed_addr #0 {
 ; CHECK-LABEL: test5:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    vfcmulcph %zmm1, %zmm0, %zmm2
-; CHECK-NEXT:    vmovaps %zmm2, %zmm0
+; CHECK-NEXT:    vpbroadcastw {{.*#+}} zmm2 = [-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0,-0.0E+0]
+; CHECK-NEXT:    vpxorq %zmm2, %zmm1, %zmm2
+; CHECK-NEXT:    vfmulcph %zmm2, %zmm0, %zmm1
+; CHECK-NEXT:    vmovaps %zmm1, %zmm0
 ; CHECK-NEXT:    retq
 entry:
   %fneg = fneg <32 x half> %b