[PATCH] D131841: [RISCV] Merge vmerge.vvm and unmasked intrinsic with VLMAX vector length.

[Luke Lau via Phabricator via llvm-commits]

luke added inline comments.
Herald added subscribers: wangpc, jobnoorman.


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Comment at: llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp:2677
+    // are dependent on Merge. VLMAX should be lowered to (XLenVT -1).
+    if (TrueVL != VL && !isAllOnesConstant(TrueVL))
       continue;
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fakepaper56 wrote:
> craig.topper wrote:
> > This is incorrect if the True opcode can raise a floating point exception. Applying the mask could lose an exception that should occur even if the result is discarded.
> > 
> > I think we need to look up the MayRaiseException property from the MCInstrDesc entry for the opcode. If it is has that properly, we need to check that the hasNoFPExcept bit in the SDNodeFlags is set before doing this combine.
> Good point. Thank you find the bug.
@fakepaper56 @craig.topper is there a reason why we only check for fp exceptions when the VL changes and not the mask too?


Repository:
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  https://reviews.llvm.org/D131841/new/

https://reviews.llvm.org/D131841