[llvm] de58b81 - [gn] port 655714a300ff303 (-gen-global-isel-combiner-matchtable)
Nico Weber via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 11 05:15:32 PDT 2023
Author: Nico Weber
Date: 2023-07-11T08:15:24-04:00
New Revision: de58b81e5cf3f7514241b86109d6dccd46a74968
URL: https://github.com/llvm/llvm-project/commit/de58b81e5cf3f7514241b86109d6dccd46a74968
DIFF: https://github.com/llvm/llvm-project/commit/de58b81e5cf3f7514241b86109d6dccd46a74968.diff
LOG: [gn] port 655714a300ff303 (-gen-global-isel-combiner-matchtable)
Added:
Modified:
llvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn
Removed:
################################################################################
diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn
index af6a7948a83bbe..90ead66d674efc 100644
--- a/llvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/lib/Target/AArch64/BUILD.gn
@@ -21,8 +21,8 @@ tablegen("AArch64GenFastISel") {
tablegen("AArch64GenO0PreLegalizeGICombiner") {
visibility = [ ":LLVMAArch64CodeGen" ]
args = [
- "-gen-global-isel-combiner",
- "-combiners=AArch64O0PreLegalizerCombinerHelper",
+ "-gen-global-isel-combiner-matchtable",
+ "-combiners=AArch64O0PreLegalizerCombiner",
]
td_file = "AArch64.td"
}
@@ -42,8 +42,8 @@ tablegen("AArch64GenMCPseudoLowering") {
tablegen("AArch64GenPostLegalizeGICombiner") {
visibility = [ ":LLVMAArch64CodeGen" ]
args = [
- "-gen-global-isel-combiner",
- "-combiners=AArch64PostLegalizerCombinerHelper",
+ "-gen-global-isel-combiner-matchtable",
+ "-combiners=AArch64PostLegalizerCombiner",
]
td_file = "AArch64.td"
}
@@ -51,8 +51,8 @@ tablegen("AArch64GenPostLegalizeGICombiner") {
tablegen("AArch64GenPreLegalizeGICombiner") {
visibility = [ ":LLVMAArch64CodeGen" ]
args = [
- "-gen-global-isel-combiner",
- "-combiners=AArch64PreLegalizerCombinerHelper",
+ "-gen-global-isel-combiner-matchtable",
+ "-combiners=AArch64PreLegalizerCombiner",
]
td_file = "AArch64.td"
}
@@ -60,8 +60,8 @@ tablegen("AArch64GenPreLegalizeGICombiner") {
tablegen("AArch64GenPostLegalizeGILowering") {
visibility = [ ":LLVMAArch64CodeGen" ]
args = [
- "-gen-global-isel-combiner",
- "-combiners=AArch64PostLegalizerLoweringHelper",
+ "-gen-global-isel-combiner-matchtable",
+ "-combiners=AArch64PostLegalizerLowering",
]
td_file = "AArch64.td"
}
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