[PATCH] D154933: [PowerPC] Implement llvm.set.rounding intrinsic
Nemanja Ivanovic via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 11 04:36:02 PDT 2023
nemanjai added a comment.
What is the plan for handling `nearest, away` rounding mode for which the PPC FPSCR does not have a setting?
================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:8854
+ DAG.getConstant(3, Dl, MVT::i32));
+ // Use x ^ (~(x >> 1) & 1) to transform LLVM rounding mode to Power format.
+ SDValue DstFlag = DAG.getNode(
----------------
Why not produce much simpler code when the parameter is constant (using `mtfsb[01]`)?
================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:11834
-MachineBasicBlock *
-PPCTargetLowering::EmitAtomicBinary(MachineInstr &MI, MachineBasicBlock *BB,
- unsigned AtomicSize,
- unsigned BinOpcode,
- unsigned CmpOpcode,
- unsigned CmpPred) const {
+MachineBasicBlock *PPCTargetLowering::EmitAtomicBinary(
+ MachineInstr &MI, MachineBasicBlock *BB, unsigned AtomicSize,
----------------
Please refrain from unrelated formatting changes.
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D154933/new/
https://reviews.llvm.org/D154933
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