[llvm] 299b2c2 - [RISCV] precommit for prefetch locality support
Piyou Chen via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 10 20:07:23 PDT 2023
Author: Piyou Chen
Date: 2023-07-10T20:07:18-07:00
New Revision: 299b2c2d93e6cd0e0cefa34f93131ee902663950
URL: https://github.com/llvm/llvm-project/commit/299b2c2d93e6cd0e0cefa34f93131ee902663950
DIFF: https://github.com/llvm/llvm-project/commit/299b2c2d93e6cd0e0cefa34f93131ee902663950.diff
LOG: [RISCV] precommit for prefetch locality support
Reviewed By: asb
Differential Revision: https://reviews.llvm.org/D154690
Added:
Modified:
llvm/test/CodeGen/RISCV/prefetch.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/RISCV/prefetch.ll b/llvm/test/CodeGen/RISCV/prefetch.ll
index 114e9df862327b..a14ac8921ca065 100644
--- a/llvm/test/CodeGen/RISCV/prefetch.ll
+++ b/llvm/test/CodeGen/RISCV/prefetch.ll
@@ -7,71 +7,332 @@
; RUN: | FileCheck -check-prefix=RV32ZICBOP %s
; RUN: llc -mtriple=riscv64 -mattr=zicbop -verify-machineinstrs < %s \
; RUN: | FileCheck -check-prefix=RV64ZICBOP %s
+; RUN: llc -mtriple=riscv64 -mattr=+zicbop,+experimental-zihintntl -verify-machineinstrs < %s \
+; RUN: | FileCheck -check-prefix=RV64ZICBOPZIHINTNTL %s
declare void @llvm.prefetch(ptr, i32, i32, i32)
-define void @test_prefetch_read(ptr %a) nounwind {
-; RV32I-LABEL: test_prefetch_read:
+define void @test_prefetch_read_locality_0(ptr %a) nounwind {
+; RV32I-LABEL: test_prefetch_read_locality_0:
; RV32I: # %bb.0:
; RV32I-NEXT: ret
;
-; RV64I-LABEL: test_prefetch_read:
+; RV64I-LABEL: test_prefetch_read_locality_0:
; RV64I: # %bb.0:
; RV64I-NEXT: ret
;
-; RV32ZICBOP-LABEL: test_prefetch_read:
+; RV32ZICBOP-LABEL: test_prefetch_read_locality_0:
; RV32ZICBOP: # %bb.0:
; RV32ZICBOP-NEXT: prefetch.r 0(a0)
; RV32ZICBOP-NEXT: ret
;
-; RV64ZICBOP-LABEL: test_prefetch_read:
+; RV64ZICBOP-LABEL: test_prefetch_read_locality_0:
; RV64ZICBOP: # %bb.0:
; RV64ZICBOP-NEXT: prefetch.r 0(a0)
; RV64ZICBOP-NEXT: ret
+;
+; RV64ZICBOPZIHINTNTL-LABEL: test_prefetch_read_locality_0:
+; RV64ZICBOPZIHINTNTL: # %bb.0:
+; RV64ZICBOPZIHINTNTL-NEXT: prefetch.r 0(a0)
+; RV64ZICBOPZIHINTNTL-NEXT: ret
+ call void @llvm.prefetch(ptr %a, i32 0, i32 0, i32 1)
+ ret void
+}
+
+define void @test_prefetch_write_locality_0(ptr %a) nounwind {
+; RV32I-LABEL: test_prefetch_write_locality_0:
+; RV32I: # %bb.0:
+; RV32I-NEXT: ret
+;
+; RV64I-LABEL: test_prefetch_write_locality_0:
+; RV64I: # %bb.0:
+; RV64I-NEXT: ret
+;
+; RV32ZICBOP-LABEL: test_prefetch_write_locality_0:
+; RV32ZICBOP: # %bb.0:
+; RV32ZICBOP-NEXT: prefetch.w 0(a0)
+; RV32ZICBOP-NEXT: ret
+;
+; RV64ZICBOP-LABEL: test_prefetch_write_locality_0:
+; RV64ZICBOP: # %bb.0:
+; RV64ZICBOP-NEXT: prefetch.w 0(a0)
+; RV64ZICBOP-NEXT: ret
+;
+; RV64ZICBOPZIHINTNTL-LABEL: test_prefetch_write_locality_0:
+; RV64ZICBOPZIHINTNTL: # %bb.0:
+; RV64ZICBOPZIHINTNTL-NEXT: prefetch.w 0(a0)
+; RV64ZICBOPZIHINTNTL-NEXT: ret
+ call void @llvm.prefetch(ptr %a, i32 1, i32 0, i32 1)
+ ret void
+}
+
+define void @test_prefetch_instruction_locality_0(ptr %a) nounwind {
+; RV32I-LABEL: test_prefetch_instruction_locality_0:
+; RV32I: # %bb.0:
+; RV32I-NEXT: ret
+;
+; RV64I-LABEL: test_prefetch_instruction_locality_0:
+; RV64I: # %bb.0:
+; RV64I-NEXT: ret
+;
+; RV32ZICBOP-LABEL: test_prefetch_instruction_locality_0:
+; RV32ZICBOP: # %bb.0:
+; RV32ZICBOP-NEXT: prefetch.i 0(a0)
+; RV32ZICBOP-NEXT: ret
+;
+; RV64ZICBOP-LABEL: test_prefetch_instruction_locality_0:
+; RV64ZICBOP: # %bb.0:
+; RV64ZICBOP-NEXT: prefetch.i 0(a0)
+; RV64ZICBOP-NEXT: ret
+;
+; RV64ZICBOPZIHINTNTL-LABEL: test_prefetch_instruction_locality_0:
+; RV64ZICBOPZIHINTNTL: # %bb.0:
+; RV64ZICBOPZIHINTNTL-NEXT: prefetch.i 0(a0)
+; RV64ZICBOPZIHINTNTL-NEXT: ret
+ call void @llvm.prefetch(ptr %a, i32 0, i32 0, i32 0)
+ ret void
+}
+
+define void @test_prefetch_read_locality_1(ptr %a) nounwind {
+; RV32I-LABEL: test_prefetch_read_locality_1:
+; RV32I: # %bb.0:
+; RV32I-NEXT: ret
+;
+; RV64I-LABEL: test_prefetch_read_locality_1:
+; RV64I: # %bb.0:
+; RV64I-NEXT: ret
+;
+; RV32ZICBOP-LABEL: test_prefetch_read_locality_1:
+; RV32ZICBOP: # %bb.0:
+; RV32ZICBOP-NEXT: prefetch.r 0(a0)
+; RV32ZICBOP-NEXT: ret
+;
+; RV64ZICBOP-LABEL: test_prefetch_read_locality_1:
+; RV64ZICBOP: # %bb.0:
+; RV64ZICBOP-NEXT: prefetch.r 0(a0)
+; RV64ZICBOP-NEXT: ret
+;
+; RV64ZICBOPZIHINTNTL-LABEL: test_prefetch_read_locality_1:
+; RV64ZICBOPZIHINTNTL: # %bb.0:
+; RV64ZICBOPZIHINTNTL-NEXT: prefetch.r 0(a0)
+; RV64ZICBOPZIHINTNTL-NEXT: ret
+ call void @llvm.prefetch(ptr %a, i32 0, i32 1, i32 1)
+ ret void
+}
+
+define void @test_prefetch_write_locality_1(ptr %a) nounwind {
+; RV32I-LABEL: test_prefetch_write_locality_1:
+; RV32I: # %bb.0:
+; RV32I-NEXT: ret
+;
+; RV64I-LABEL: test_prefetch_write_locality_1:
+; RV64I: # %bb.0:
+; RV64I-NEXT: ret
+;
+; RV32ZICBOP-LABEL: test_prefetch_write_locality_1:
+; RV32ZICBOP: # %bb.0:
+; RV32ZICBOP-NEXT: prefetch.w 0(a0)
+; RV32ZICBOP-NEXT: ret
+;
+; RV64ZICBOP-LABEL: test_prefetch_write_locality_1:
+; RV64ZICBOP: # %bb.0:
+; RV64ZICBOP-NEXT: prefetch.w 0(a0)
+; RV64ZICBOP-NEXT: ret
+;
+; RV64ZICBOPZIHINTNTL-LABEL: test_prefetch_write_locality_1:
+; RV64ZICBOPZIHINTNTL: # %bb.0:
+; RV64ZICBOPZIHINTNTL-NEXT: prefetch.w 0(a0)
+; RV64ZICBOPZIHINTNTL-NEXT: ret
+ call void @llvm.prefetch(ptr %a, i32 1, i32 1, i32 1)
+ ret void
+}
+
+define void @test_prefetch_instruction_locality_1(ptr %a) nounwind {
+; RV32I-LABEL: test_prefetch_instruction_locality_1:
+; RV32I: # %bb.0:
+; RV32I-NEXT: ret
+;
+; RV64I-LABEL: test_prefetch_instruction_locality_1:
+; RV64I: # %bb.0:
+; RV64I-NEXT: ret
+;
+; RV32ZICBOP-LABEL: test_prefetch_instruction_locality_1:
+; RV32ZICBOP: # %bb.0:
+; RV32ZICBOP-NEXT: prefetch.i 0(a0)
+; RV32ZICBOP-NEXT: ret
+;
+; RV64ZICBOP-LABEL: test_prefetch_instruction_locality_1:
+; RV64ZICBOP: # %bb.0:
+; RV64ZICBOP-NEXT: prefetch.i 0(a0)
+; RV64ZICBOP-NEXT: ret
+;
+; RV64ZICBOPZIHINTNTL-LABEL: test_prefetch_instruction_locality_1:
+; RV64ZICBOPZIHINTNTL: # %bb.0:
+; RV64ZICBOPZIHINTNTL-NEXT: prefetch.i 0(a0)
+; RV64ZICBOPZIHINTNTL-NEXT: ret
+ call void @llvm.prefetch(ptr %a, i32 0, i32 1, i32 0)
+ ret void
+}
+
+define void @test_prefetch_read_locality_2(ptr %a) nounwind {
+; RV32I-LABEL: test_prefetch_read_locality_2:
+; RV32I: # %bb.0:
+; RV32I-NEXT: ret
+;
+; RV64I-LABEL: test_prefetch_read_locality_2:
+; RV64I: # %bb.0:
+; RV64I-NEXT: ret
+;
+; RV32ZICBOP-LABEL: test_prefetch_read_locality_2:
+; RV32ZICBOP: # %bb.0:
+; RV32ZICBOP-NEXT: prefetch.r 0(a0)
+; RV32ZICBOP-NEXT: ret
+;
+; RV64ZICBOP-LABEL: test_prefetch_read_locality_2:
+; RV64ZICBOP: # %bb.0:
+; RV64ZICBOP-NEXT: prefetch.r 0(a0)
+; RV64ZICBOP-NEXT: ret
+;
+; RV64ZICBOPZIHINTNTL-LABEL: test_prefetch_read_locality_2:
+; RV64ZICBOPZIHINTNTL: # %bb.0:
+; RV64ZICBOPZIHINTNTL-NEXT: prefetch.r 0(a0)
+; RV64ZICBOPZIHINTNTL-NEXT: ret
call void @llvm.prefetch(ptr %a, i32 0, i32 2, i32 1)
ret void
}
-define void @test_prefetch_write(ptr %a) nounwind {
-; RV32I-LABEL: test_prefetch_write:
+define void @test_prefetch_write_locality_2(ptr %a) nounwind {
+; RV32I-LABEL: test_prefetch_write_locality_2:
; RV32I: # %bb.0:
; RV32I-NEXT: ret
;
-; RV64I-LABEL: test_prefetch_write:
+; RV64I-LABEL: test_prefetch_write_locality_2:
; RV64I: # %bb.0:
; RV64I-NEXT: ret
;
-; RV32ZICBOP-LABEL: test_prefetch_write:
+; RV32ZICBOP-LABEL: test_prefetch_write_locality_2:
; RV32ZICBOP: # %bb.0:
; RV32ZICBOP-NEXT: prefetch.w 0(a0)
; RV32ZICBOP-NEXT: ret
;
-; RV64ZICBOP-LABEL: test_prefetch_write:
+; RV64ZICBOP-LABEL: test_prefetch_write_locality_2:
; RV64ZICBOP: # %bb.0:
; RV64ZICBOP-NEXT: prefetch.w 0(a0)
; RV64ZICBOP-NEXT: ret
+;
+; RV64ZICBOPZIHINTNTL-LABEL: test_prefetch_write_locality_2:
+; RV64ZICBOPZIHINTNTL: # %bb.0:
+; RV64ZICBOPZIHINTNTL-NEXT: prefetch.w 0(a0)
+; RV64ZICBOPZIHINTNTL-NEXT: ret
call void @llvm.prefetch(ptr %a, i32 1, i32 2, i32 1)
ret void
}
-define void @test_prefetch_instruction(ptr %a) nounwind {
-; RV32I-LABEL: test_prefetch_instruction:
+define void @test_prefetch_instruction_locality_2(ptr %a) nounwind {
+; RV32I-LABEL: test_prefetch_instruction_locality_2:
; RV32I: # %bb.0:
; RV32I-NEXT: ret
;
-; RV64I-LABEL: test_prefetch_instruction:
+; RV64I-LABEL: test_prefetch_instruction_locality_2:
; RV64I: # %bb.0:
; RV64I-NEXT: ret
;
-; RV32ZICBOP-LABEL: test_prefetch_instruction:
+; RV32ZICBOP-LABEL: test_prefetch_instruction_locality_2:
; RV32ZICBOP: # %bb.0:
; RV32ZICBOP-NEXT: prefetch.i 0(a0)
; RV32ZICBOP-NEXT: ret
;
-; RV64ZICBOP-LABEL: test_prefetch_instruction:
+; RV64ZICBOP-LABEL: test_prefetch_instruction_locality_2:
; RV64ZICBOP: # %bb.0:
; RV64ZICBOP-NEXT: prefetch.i 0(a0)
; RV64ZICBOP-NEXT: ret
+;
+; RV64ZICBOPZIHINTNTL-LABEL: test_prefetch_instruction_locality_2:
+; RV64ZICBOPZIHINTNTL: # %bb.0:
+; RV64ZICBOPZIHINTNTL-NEXT: prefetch.i 0(a0)
+; RV64ZICBOPZIHINTNTL-NEXT: ret
call void @llvm.prefetch(ptr %a, i32 0, i32 2, i32 0)
ret void
}
+
+
+define void @test_prefetch_read_locality_3(ptr %a) nounwind {
+; RV32I-LABEL: test_prefetch_read_locality_3:
+; RV32I: # %bb.0:
+; RV32I-NEXT: ret
+;
+; RV64I-LABEL: test_prefetch_read_locality_3:
+; RV64I: # %bb.0:
+; RV64I-NEXT: ret
+;
+; RV32ZICBOP-LABEL: test_prefetch_read_locality_3:
+; RV32ZICBOP: # %bb.0:
+; RV32ZICBOP-NEXT: prefetch.r 0(a0)
+; RV32ZICBOP-NEXT: ret
+;
+; RV64ZICBOP-LABEL: test_prefetch_read_locality_3:
+; RV64ZICBOP: # %bb.0:
+; RV64ZICBOP-NEXT: prefetch.r 0(a0)
+; RV64ZICBOP-NEXT: ret
+;
+; RV64ZICBOPZIHINTNTL-LABEL: test_prefetch_read_locality_3:
+; RV64ZICBOPZIHINTNTL: # %bb.0:
+; RV64ZICBOPZIHINTNTL-NEXT: prefetch.r 0(a0)
+; RV64ZICBOPZIHINTNTL-NEXT: ret
+ call void @llvm.prefetch(ptr %a, i32 0, i32 3, i32 1)
+ ret void
+}
+
+define void @test_prefetch_write_locality_3(ptr %a) nounwind {
+; RV32I-LABEL: test_prefetch_write_locality_3:
+; RV32I: # %bb.0:
+; RV32I-NEXT: ret
+;
+; RV64I-LABEL: test_prefetch_write_locality_3:
+; RV64I: # %bb.0:
+; RV64I-NEXT: ret
+;
+; RV32ZICBOP-LABEL: test_prefetch_write_locality_3:
+; RV32ZICBOP: # %bb.0:
+; RV32ZICBOP-NEXT: prefetch.w 0(a0)
+; RV32ZICBOP-NEXT: ret
+;
+; RV64ZICBOP-LABEL: test_prefetch_write_locality_3:
+; RV64ZICBOP: # %bb.0:
+; RV64ZICBOP-NEXT: prefetch.w 0(a0)
+; RV64ZICBOP-NEXT: ret
+;
+; RV64ZICBOPZIHINTNTL-LABEL: test_prefetch_write_locality_3:
+; RV64ZICBOPZIHINTNTL: # %bb.0:
+; RV64ZICBOPZIHINTNTL-NEXT: prefetch.w 0(a0)
+; RV64ZICBOPZIHINTNTL-NEXT: ret
+ call void @llvm.prefetch(ptr %a, i32 1, i32 3, i32 1)
+ ret void
+}
+
+define void @test_prefetch_instruction_locality_3(ptr %a) nounwind {
+; RV32I-LABEL: test_prefetch_instruction_locality_3:
+; RV32I: # %bb.0:
+; RV32I-NEXT: ret
+;
+; RV64I-LABEL: test_prefetch_instruction_locality_3:
+; RV64I: # %bb.0:
+; RV64I-NEXT: ret
+;
+; RV32ZICBOP-LABEL: test_prefetch_instruction_locality_3:
+; RV32ZICBOP: # %bb.0:
+; RV32ZICBOP-NEXT: prefetch.i 0(a0)
+; RV32ZICBOP-NEXT: ret
+;
+; RV64ZICBOP-LABEL: test_prefetch_instruction_locality_3:
+; RV64ZICBOP: # %bb.0:
+; RV64ZICBOP-NEXT: prefetch.i 0(a0)
+; RV64ZICBOP-NEXT: ret
+;
+; RV64ZICBOPZIHINTNTL-LABEL: test_prefetch_instruction_locality_3:
+; RV64ZICBOPZIHINTNTL: # %bb.0:
+; RV64ZICBOPZIHINTNTL-NEXT: prefetch.i 0(a0)
+; RV64ZICBOPZIHINTNTL-NEXT: ret
+ call void @llvm.prefetch(ptr %a, i32 0, i32 3, i32 0)
+ ret void
+}
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