[llvm] 1ab4424 - [X86] Regenerate or-address.ll test checks

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2023-07-10T16:55:52+01:00
New Revision: 1ab442464b586d21ae3f37d85d83231bc53b1e69

URL: https://github.com/llvm/llvm-project/commit/1ab442464b586d21ae3f37d85d83231bc53b1e69
DIFF: https://github.com/llvm/llvm-project/commit/1ab442464b586d21ae3f37d85d83231bc53b1e69.diff

LOG: [X86] Regenerate or-address.ll test checks

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/or-address.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/X86/or-address.ll b/llvm/test/CodeGen/X86/or-address.ll
index be8578d3dd9b43..ef1ea0ef5de952 100644
--- a/llvm/test/CodeGen/X86/or-address.ll
+++ b/llvm/test/CodeGen/X86/or-address.ll
@@ -1,15 +1,38 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
 ; PR1135
 ; RUN: llc %s -o - | FileCheck %s
+
 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
 target triple = "x86_64-apple-darwin10.3"
 
-
-; CHECK: 	movl	%{{.*}},   (%rdi,[[R0:.+]],4)
-; CHECK:	movl	%{{.*}},  8(%rdi,[[R0]],4)
-; CHECK:	movl	%{{.*}},  4(%rdi,[[R0]],4)
-; CHECK:	movl	%{{.*}}, 12(%rdi,[[R0]],4)
-
 define void @test(ptr nocapture %array, i32 %r0) nounwind ssp noredzone {
+; CHECK-LABEL: test:
+; CHECK:       ## %bb.0: ## %bb.nph
+; CHECK-NEXT:    movb $32, %al
+; CHECK-NEXT:    xorl %ecx, %ecx
+; CHECK-NEXT:    xorl %edx, %edx
+; CHECK-NEXT:    xorl %r8d, %r8d
+; CHECK-NEXT:    .p2align 4, 0x90
+; CHECK-NEXT:  LBB0_1: ## %bb
+; CHECK-NEXT:    ## =>This Inner Loop Header: Depth=1
+; CHECK-NEXT:    cmpb $4, %r8b
+; CHECK-NEXT:    movzbl %r8b, %r8d
+; CHECK-NEXT:    cmovgel %ecx, %r8d
+; CHECK-NEXT:    sete %r9b
+; CHECK-NEXT:    addb %r9b, %dl
+; CHECK-NEXT:    leal (,%rdx,4), %r9d
+; CHECK-NEXT:    addb %r8b, %r9b
+; CHECK-NEXT:    shlb $2, %r9b
+; CHECK-NEXT:    movzbl %r9b, %r9d
+; CHECK-NEXT:    movl %esi, (%rdi,%r9,4)
+; CHECK-NEXT:    movl %esi, 8(%rdi,%r9,4)
+; CHECK-NEXT:    movl %esi, 4(%rdi,%r9,4)
+; CHECK-NEXT:    movl %esi, 12(%rdi,%r9,4)
+; CHECK-NEXT:    incb %r8b
+; CHECK-NEXT:    decb %al
+; CHECK-NEXT:    jne LBB0_1
+; CHECK-NEXT:  ## %bb.2: ## %return
+; CHECK-NEXT:    retq
 bb.nph:
   br label %bb
 
@@ -46,13 +69,34 @@ return:                                           ; preds = %bb
   ret void
 }
 
-; CHECK-LABEL: test1:
-; CHECK:	movl	%{{.*}}, (%[[BASE:r.*]],%[[INDEX:r.*]],4)
-; CHECK:	movl	%{{.*}}, 8(%[[BASE]],%[[INDEX]],4)
-; CHECK:	movl	%{{.*}}, 4(%[[BASE]],%[[INDEX]],4)
-; CHECK:	movl	%{{.*}}, 12(%[[BASE]],%[[INDEX]],4)
-
 define void @test1(ptr nocapture %array, i32 %r0, i8 signext %k, i8 signext %i0) nounwind {
+; CHECK-LABEL: test1:
+; CHECK:       ## %bb.0: ## %bb.nph
+; CHECK-NEXT:    ## kill: def $ecx killed $ecx def $rcx
+; CHECK-NEXT:    movb $32, %al
+; CHECK-NEXT:    xorl %r8d, %r8d
+; CHECK-NEXT:    .p2align 4, 0x90
+; CHECK-NEXT:  LBB1_1: ## %for.body
+; CHECK-NEXT:    ## =>This Inner Loop Header: Depth=1
+; CHECK-NEXT:    cmpb $4, %cl
+; CHECK-NEXT:    movzbl %cl, %ecx
+; CHECK-NEXT:    cmovgel %r8d, %ecx
+; CHECK-NEXT:    sete %r9b
+; CHECK-NEXT:    addb %r9b, %dl
+; CHECK-NEXT:    leal (,%rcx,4), %r9d
+; CHECK-NEXT:    movl %edx, %r10d
+; CHECK-NEXT:    shlb $4, %r10b
+; CHECK-NEXT:    addb %r9b, %r10b
+; CHECK-NEXT:    movzbl %r10b, %r9d
+; CHECK-NEXT:    movl %esi, (%rdi,%r9,4)
+; CHECK-NEXT:    movl %esi, 8(%rdi,%r9,4)
+; CHECK-NEXT:    movl %esi, 4(%rdi,%r9,4)
+; CHECK-NEXT:    movl %esi, 12(%rdi,%r9,4)
+; CHECK-NEXT:    incb %cl
+; CHECK-NEXT:    decb %al
+; CHECK-NEXT:    jne LBB1_1
+; CHECK-NEXT:  ## %bb.2: ## %for.end
+; CHECK-NEXT:    retq
 bb.nph:
   br label %for.body