[PATCH] D154829: [SVE2p1][SME2] Add scalar addressing mode for LD1

[Matt Devereau via Phabricator via llvm-commits]

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Add the scalar addressing mode for multi vector LD1 instructions.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D154829

Files:
  llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
  llvm/test/CodeGen/AArch64/sve2p1-intrinsics-loads.ll

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