[PATCH] D147539: [LV] Enable stride versioning to support Fortran IR

[Peixin Qiao via Phabricator via llvm-commits]

peixin added inline comments.


================
Comment at: llvm/test/Transforms/LoopVectorize/stride-accesses-unit-check-fix.ll:33
+
+target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
+
----------------
david-arm wrote:
> Not sure if we should be including target-specific things for tests in the top level LoopVectorize directory?
It's common to include the target datalayout.
```
$ grep -r "target datalayout" llvm/test/Transforms/LoopVectorize/
llvm/test/Transforms/LoopVectorize/pr39417-optsize-scevchecks.ll:target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
llvm/test/Transforms/LoopVectorize/no_array_bounds.ll:target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
llvm/test/Transforms/LoopVectorize/use-scalar-epilogue-if-tp-fails.ll:target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
llvm/test/Transforms/LoopVectorize/libcall-remark.ll:target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll:target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
```

Usually we don't include `target triple`. But `target datalayout` is required to run `opt`.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D147539/new/

https://reviews.llvm.org/D147539