[llvm] 5ccfc45 - AMDGPU: Fold away mbcnt.hi in wave32 mode
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 30 12:04:10 PDT 2023
Author: Matt Arsenault
Date: 2023-06-30T15:04:03-04:00
New Revision: 5ccfc4543d1784ed98cfae52364e438de5a993a6
URL: https://github.com/llvm/llvm-project/commit/5ccfc4543d1784ed98cfae52364e438de5a993a6
DIFF: https://github.com/llvm/llvm-project/commit/5ccfc4543d1784ed98cfae52364e438de5a993a6.diff
LOG: AMDGPU: Fold away mbcnt.hi in wave32 mode
This will allow libraries to drop some of the special casing based on
wave size.
Added:
Modified:
llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
llvm/test/Transforms/InstCombine/AMDGPU/mbcnt.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp b/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
index b3bb61d8764a63..3c399e49722785 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
@@ -902,6 +902,12 @@ GCNTTIImpl::instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const {
break;
}
+ case Intrinsic::amdgcn_mbcnt_hi: {
+ // exec_hi is all 0, so this is just a copy.
+ if (ST->isWave32())
+ return IC.replaceInstUsesWith(II, II.getArgOperand(1));
+ break;
+ }
case Intrinsic::amdgcn_ballot: {
if (auto *Src = dyn_cast<ConstantInt>(II.getArgOperand(0))) {
if (Src->isZero()) {
diff --git a/llvm/test/Transforms/InstCombine/AMDGPU/mbcnt.ll b/llvm/test/Transforms/InstCombine/AMDGPU/mbcnt.ll
index 24505881ea0904..bd7792f21c0a54 100644
--- a/llvm/test/Transforms/InstCombine/AMDGPU/mbcnt.ll
+++ b/llvm/test/Transforms/InstCombine/AMDGPU/mbcnt.ll
@@ -36,8 +36,7 @@ define i32 @mbcnt_hi(i32 %x, i32 %y) {
;
; WAVE32-LABEL: define i32 @mbcnt_hi
; WAVE32-SAME: (i32 [[X:%.*]], i32 [[Y:%.*]]) #[[ATTR1]] {
-; WAVE32-NEXT: [[HI:%.*]] = call i32 @llvm.amdgcn.mbcnt.hi(i32 [[X]], i32 [[Y]])
-; WAVE32-NEXT: ret i32 [[HI]]
+; WAVE32-NEXT: ret i32 [[Y]]
;
; WAVE64-LABEL: define i32 @mbcnt_hi
; WAVE64-SAME: (i32 [[X:%.*]], i32 [[Y:%.*]]) #[[ATTR1]] {
@@ -58,8 +57,7 @@ define i32 @mbcnt_lo_hi(i32 %x, i32 %y, i32 %z) {
; WAVE32-LABEL: define i32 @mbcnt_lo_hi
; WAVE32-SAME: (i32 [[X:%.*]], i32 [[Y:%.*]], i32 [[Z:%.*]]) #[[ATTR1]] {
; WAVE32-NEXT: [[LO:%.*]] = call i32 @llvm.amdgcn.mbcnt.lo(i32 [[X]], i32 [[Y]])
-; WAVE32-NEXT: [[HI:%.*]] = call i32 @llvm.amdgcn.mbcnt.hi(i32 [[Z]], i32 [[LO]])
-; WAVE32-NEXT: ret i32 [[HI]]
+; WAVE32-NEXT: ret i32 [[LO]]
;
; WAVE64-LABEL: define i32 @mbcnt_lo_hi
; WAVE64-SAME: (i32 [[X:%.*]], i32 [[Y:%.*]], i32 [[Z:%.*]]) #[[ATTR1]] {
@@ -81,8 +79,7 @@ define i32 @ockl_lane_u32() {
; WAVE32-LABEL: define i32 @ockl_lane_u32
; WAVE32-SAME: () #[[ATTR1]] {
; WAVE32-NEXT: [[LO:%.*]] = call i32 @llvm.amdgcn.mbcnt.lo(i32 -1, i32 0)
-; WAVE32-NEXT: [[HI:%.*]] = call i32 @llvm.amdgcn.mbcnt.hi(i32 -1, i32 [[LO]])
-; WAVE32-NEXT: ret i32 [[HI]]
+; WAVE32-NEXT: ret i32 [[LO]]
;
; WAVE64-LABEL: define i32 @ockl_lane_u32
; WAVE64-SAME: () #[[ATTR1]] {
More information about the llvm-commits
mailing list