[PATCH] D154136: [RISCV] Add SEW to RISCVInversePseudoTable
    Michael Maitland via Phabricator via llvm-commits 
    llvm-commits at lists.llvm.org
       
    Fri Jun 30 09:28:39 PDT 2023
    
    
  
michaelmaitland added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrFormats.td:224
+  // 0b10=E32, 0b11=E64.
+  bits<7> SEW = 0;
 }
----------------
craig.topper wrote:
> michaelmaitland wrote:
> > craig.topper wrote:
> > > Can this be in the `RISCVVPseudo` class?
> > It did, but it feels slightly out of place since VLMul exists in RVInst. I wonder if VLMul should be moved to RISCVVPseudo in a separate patch.
> VLMul has to be there because it is part of TSFlags.
I understand now. I've moved SEW to RISCVVPseudo.
Repository:
  rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D154136/new/
https://reviews.llvm.org/D154136
    
    
More information about the llvm-commits
mailing list