[PATCH] D154126: [InstCombine] Transform (A > 0) | (A < 0) -> zext (A != 0) fold

Hongyu Chen via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Jun 30 05:23:09 PDT 2023


XChy updated this revision to Diff 536192.
XChy added a comment.

[Format the code to pass the patch test]


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D154126/new/

https://reviews.llvm.org/D154126

Files:
  llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
  llvm/test/Transforms/InstCombine/and-or-icmps.ll


Index: llvm/test/Transforms/InstCombine/and-or-icmps.ll
===================================================================
--- llvm/test/Transforms/InstCombine/and-or-icmps.ll
+++ llvm/test/Transforms/InstCombine/and-or-icmps.ll
@@ -2569,6 +2569,7 @@
   ret <2 x i1> %r
 }
 
+
 define i32 @icmp_slt_0_or_icmp_sgt_0_i32(i32 %x) {
 ; CHECK-LABEL: @icmp_slt_0_or_icmp_sgt_0_i32(
 ; CHECK-NEXT:    [[TMP1:%.*]] = icmp ne i32 [[X:%.*]], 0
@@ -2583,6 +2584,7 @@
   ret i32 %E
 }
 
+
 define i64 @icmp_slt_0_or_icmp_sgt_0_i64(i64 %x) {
 ; CHECK-LABEL: @icmp_slt_0_or_icmp_sgt_0_i64(
 ; CHECK-NEXT:    [[TMP1:%.*]] = icmp ne i64 [[X:%.*]], 0
@@ -2597,6 +2599,7 @@
   ret i64 %E
 }
 
+
 define i64 @icmp_slt_0_or_icmp_sgt_0_i64_neg0(i64 %x) {
 ; CHECK-LABEL: @icmp_slt_0_or_icmp_sgt_0_i64_neg0(
 ; CHECK-NEXT:    [[E:%.*]] = lshr i64 [[X:%.*]], 63
@@ -2609,6 +2612,7 @@
   ret i64 %E
 }
 
+
 define i64 @icmp_slt_0_or_icmp_sgt_0_i64_neg1(i64 %x) {
 ; CHECK-LABEL: @icmp_slt_0_or_icmp_sgt_0_i64_neg1(
 ; CHECK-NEXT:    [[B:%.*]] = icmp sgt i64 [[X:%.*]], 0
@@ -2624,6 +2628,7 @@
   ret i64 %E
 }
 
+
 define i64 @icmp_slt_0_or_icmp_sgt_0_i64_neg2(i64 %x) {
 ; CHECK-LABEL: @icmp_slt_0_or_icmp_sgt_0_i64_neg2(
 ; CHECK-NEXT:    [[B:%.*]] = icmp sgt i64 [[X:%.*]], 0
@@ -2639,6 +2644,7 @@
   ret i64 %E
 }
 
+
 define i64 @icmp_slt_0_or_icmp_sgt_0_i64_neg3(i64 %x) {
 ; CHECK-LABEL: @icmp_slt_0_or_icmp_sgt_0_i64_neg3(
 ; CHECK-NEXT:    [[C:%.*]] = ashr i64 [[X:%.*]], 62
@@ -2653,6 +2659,7 @@
   ret i64 %E
 }
 
+
 define <2 x i64> @icmp_slt_0_or_icmp_sgt_0_i64x2(<2 x i64> %x) {
 ; CHECK-LABEL: @icmp_slt_0_or_icmp_sgt_0_i64x2(
 ; CHECK-NEXT:    [[TMP1:%.*]] = icmp ne <2 x i64> [[X:%.*]], zeroinitializer
@@ -2667,6 +2674,7 @@
   ret <2 x i64> %E
 }
 
+
 define <2 x i64> @icmp_slt_0_or_icmp_sgt_0_i64x2_neg(<2 x i64> %x) {
 ; CHECK-LABEL: @icmp_slt_0_or_icmp_sgt_0_i64x2_neg(
 ; CHECK-NEXT:    [[B:%.*]] = icmp sgt <2 x i64> [[X:%.*]], zeroinitializer
Index: llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
===================================================================
--- llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
+++ llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
@@ -1725,7 +1725,7 @@
           match(Op1, m_ZExt(m_ICmp(Pred, m_Specific(A), m_Zero())));
   };
 
-  if (LogicOpc == Instruction::Or && 
+  if (LogicOpc == Instruction::Or &&
           (MatchOrZextIcmp(Op0, Op1) || MatchOrZextIcmp(Op1, Op0))){
     uint64_t X = A->getType()->getScalarSizeInBits();
     bool MatchBAndX;
@@ -1735,7 +1735,7 @@
         MatchBAndX = cast<ConstantInt>(B->getSplatValue())->equalsInt(X - 1);
 
     if (Pred == ICmpInst::ICMP_SGT && MatchBAndX) {
-      Value *Cmp = Builder.CreateICmp(ICmpInst::ICMP_NE, A, 
+      Value *Cmp = Builder.CreateICmp(ICmpInst::ICMP_NE, A,
               Constant::getNullValue(A->getType()));
       return new ZExtInst(Cmp, A->getType());
     }


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