[PATCH] D154084: [AArch64] Modify SVE Pseudo appends

[harvin iriawan via Phabricator via llvm-commits]

harviniriawan added a comment.

In D154084#4463203 <https://reviews.llvm.org/D154084#4463203>, @paulwalker-arm wrote:

> In D154084#4460011 <https://reviews.llvm.org/D154084#4460011>, @harviniriawan wrote:
>
>> In D154084#4459841 <https://reviews.llvm.org/D154084#4459841>, @paulwalker-arm wrote:
>>
>>> Can the UNDEF_D -> D_UNDEF renaming be pulled into a separate NFC patch?
>>
>> I don't think it's possible. I can add tests on Neoverse-N2 CPU as well in here, then
>
> Are you sure? To be clear I'm talking about the changes to `llvm/lib/Target/AArch64/SVEInstrFormats.td` which looks like a mechanical name change to me that should not affect any behaviour. If it does then that's likely a bug.

the UNDEF is actually used in pseudo lowering (if that's the right term). In AArch64GenInstrInfo.inc : So if during pre RA MI Sched the UNDEF variant of the SVE instruction is being generated, it will not pick up the right latency
// getSVEPseudoMap
LLVM_READONLY
int getSVEPseudoMap(uint16_t Opcode) {
static const uint16_t getSVEPseudoMapTable[][2] = {

  { AArch64::ABS_ZPmZ_B_UNDEF, AArch64::ABS_ZPmZ_B },
  { AArch64::ABS_ZPmZ_D_UNDEF, AArch64::ABS_ZPmZ_D },


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