[PATCH] D153101: [SPIR-V] Simplify regclasses hierarchy and cleanup regbanks
Ilia Diachkov via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 29 12:07:05 PDT 2023
iliya-diyachkov added a comment.
In general it looks fine. We also need to check testing results.
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Comment at: llvm/lib/Target/SPIRV/SPIRVInstrInfo.td:99
"$res = OpExtInstImport $extInstsName">;
-def OpExtInst: Op<12, (outs ID:$res), (ins TYPE:$ty, ID:$set, Extension:$inst, variable_ops),
+def OpExtInst: Op<12, (outs ID:$res), (ins TYPE:$ty, i32imm:$set, Extension:$inst, variable_ops),
"$res = OpExtInst $ty $set $inst">;
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Should `$set` be `i32imm`, not `ID`? `OpExtInstImport`'s result is still `ID`.
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D153101/new/
https://reviews.llvm.org/D153101
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