[PATCH] D152826: [AArch64] Improve shuffles of i1 vectors (WIP)

[Sjoerd Meijer via Phabricator via llvm-commits]

SjoerdMeijer added a comment.

> There seems to just be too much shuffling going on. I am attempting to see if I can stop the vectorization in that case instead.

Ok, so parking this, and instead focus on reigning in vectorisation? I guess it makes sense and is another way of doing it.
I can't remember why we went for fixing the codegen. Perhaps that was just a fun exercise, and avoids looking at cost-modelling again if we manage to get the vector code on par with the scalar code (that would be good enough for this case).


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D152826/new/

https://reviews.llvm.org/D152826