[PATCH] D153696: [LV] Only generate 1st part outside of vector region for VPInstruction.

[Florian Hahn via Phabricator via llvm-commits]

fhahn updated this revision to Diff 535716.
fhahn marked an inline comment as done.
fhahn added a comment.

Address latest comments, thanks!

In D153696#4449042 <https://reviews.llvm.org/D153696#4449042>, @Ayal wrote:

>> Update VPInstruction::execute to only generate code for the first part
>> if the recipe is outside the vector loop region (i.e. the pre-headers
>> for now).
>
> If a recipe should generate code for first part only, depends in general on its uniformity rather than it being placed inside or outside the vector loop region.
>
> Simpler and more consistent to register uniform values across all parts when defined, rather than check their uniformity during retrieval when used?

Updated to generate the first part only and register the value accross all parts as suggested. For now, I updated the code to use isDefinedOutsideVectorRegions. This can be further extended to check for invariant/uniform-across-VF in the future.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D153696/new/

https://reviews.llvm.org/D153696

Files:
  llvm/lib/Transforms/Vectorize/VPlan.cpp
  llvm/lib/Transforms/Vectorize/VPlan.h
  llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
  llvm/lib/Transforms/Vectorize/VPlanValue.h
  llvm/test/Transforms/LoopVectorize/AArch64/interleaving-load-store.ll
  llvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll
  llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
  llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-unroll.ll
  llvm/test/Transforms/LoopVectorize/ARM/pointer_iv.ll
  llvm/test/Transforms/LoopVectorize/X86/epilog-vectorization-inductions.ll
  llvm/test/Transforms/LoopVectorize/X86/intrinsiccost.ll
  llvm/test/Transforms/LoopVectorize/X86/load-deref-pred.ll
  llvm/test/Transforms/LoopVectorize/X86/pr54634.ll
  llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
  llvm/test/Transforms/LoopVectorize/float-induction.ll
  llvm/test/Transforms/LoopVectorize/induction.ll
  llvm/test/Transforms/LoopVectorize/reduction-inloop-uf4.ll
  llvm/test/Transforms/LoopVectorize/scalable-first-order-recurrence.ll
  llvm/test/Transforms/PhaseOrdering/AArch64/hoisting-sinking-required-for-vectorization.ll
  llvm/test/Transforms/PhaseOrdering/X86/vdiv.ll

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