[PATCH] D153499: [RISCV] Add support for custom CSRs for Sifive S76.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVSystemOperands.td:43
 
 def SysRegsList : GenericTable {
   let FilterClass = "SysReg";
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garvitgupta08 wrote:
> craig.topper wrote:
> > I wonder if maybe we should have a separate table for alternate registers?
> Can you elaborate on this?
SysReg and SysRegsList together generate a "searchable table". This patch adds extra fields to every CSR in that table just for a couple CSRs. That makes the table larger.

 May we should have AltSysReg and AltSysRegsList create a separate second search table for these 2 registers. Or SiFiveSysReg and SiFiveRegsList if we wanted a table per vendor.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D153499/new/

https://reviews.llvm.org/D153499