[llvm] d7d4aa5 - AMDGPU: Move AMDGPUAttributor run earlier
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 28 10:13:08 PDT 2023
Author: Matt Arsenault
Date: 2023-06-28T12:42:40-04:00
New Revision: d7d4aa539c0d2f80c080a3b1e0fa45a78d5e9bfc
URL: https://github.com/llvm/llvm-project/commit/d7d4aa539c0d2f80c080a3b1e0fa45a78d5e9bfc
DIFF: https://github.com/llvm/llvm-project/commit/d7d4aa539c0d2f80c080a3b1e0fa45a78d5e9bfc.diff
LOG: AMDGPU: Move AMDGPUAttributor run earlier
Move it up with other module passes. It's a higher level optimization
that should probably be done before hacking up the IR for codegen. It
should really be done earlier than this. We could possibly move this
with other IPO passes, but we'd have to stop inferring the lack of
lds.kernel.id calls and have the LDS module pass mark functions which
don't need the ID.
The one test change is because that pass is relying on the backend run
of SROA (which we ideally wouldn't have).
Added:
Modified:
llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
index 38e0bca649801..a3599fdd32838 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -990,6 +990,11 @@ void AMDGPUPassConfig::addIRPasses() {
addPass(createAMDGPULowerModuleLDSPass());
}
+ // AMDGPUAttributor infers lack of llvm.amdgcn.lds.kernel.id calls, so run
+ // after their introduction
+ if (TM.getOptLevel() > CodeGenOpt::None)
+ addPass(createAMDGPUAttributorPass());
+
if (TM.getOptLevel() > CodeGenOpt::None)
addPass(createInferAddressSpacesPass());
@@ -1046,9 +1051,6 @@ void AMDGPUPassConfig::addCodeGenPrepare() {
if (RemoveIncompatibleFunctions)
addPass(createAMDGPURemoveIncompatibleFunctionsPass(TM));
- if (TM->getOptLevel() > CodeGenOpt::None)
- addPass(createAMDGPUAttributorPass());
-
// FIXME: This pass adds 2 hacky attributes that can be replaced with an
// analysis, and should be removed.
addPass(createAMDGPUAnnotateKernelFeaturesPass());
diff --git a/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll b/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
index 66c9fc8fd429e..35750da0883a5 100644
--- a/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
+++ b/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
@@ -185,6 +185,9 @@
; GCN-O1-NEXT: Function Alias Analysis Results
; GCN-O1-NEXT: Lower OpenCL enqueued blocks
; GCN-O1-NEXT: Lower uses of LDS variables from non-kernel functions
+; GCN-O1-NEXT: AMDGPU Attributor
+; GCN-O1-NEXT: FunctionPass Manager
+; GCN-O1-NEXT: Cycle Info Analysis
; GCN-O1-NEXT: FunctionPass Manager
; GCN-O1-NEXT: Infer address spaces
; GCN-O1-NEXT: Expand Atomic instructions
@@ -224,9 +227,6 @@
; GCN-O1-NEXT: Natural Loop Information
; GCN-O1-NEXT: TLS Variable Hoist
; GCN-O1-NEXT: AMDGPU Remove Incompatible Functions
-; GCN-O1-NEXT: AMDGPU Attributor
-; GCN-O1-NEXT: FunctionPass Manager
-; GCN-O1-NEXT: Cycle Info Analysis
; GCN-O1-NEXT: CallGraph Construction
; GCN-O1-NEXT: Call Graph SCC Pass Manager
; GCN-O1-NEXT: AMDGPU Annotate Kernel Features
@@ -461,6 +461,9 @@
; GCN-O1-OPTS-NEXT: Function Alias Analysis Results
; GCN-O1-OPTS-NEXT: Lower OpenCL enqueued blocks
; GCN-O1-OPTS-NEXT: Lower uses of LDS variables from non-kernel functions
+; GCN-O1-OPTS-NEXT: AMDGPU Attributor
+; GCN-O1-OPTS-NEXT: FunctionPass Manager
+; GCN-O1-OPTS-NEXT: Cycle Info Analysis
; GCN-O1-OPTS-NEXT: FunctionPass Manager
; GCN-O1-OPTS-NEXT: Infer address spaces
; GCN-O1-OPTS-NEXT: Expand Atomic instructions
@@ -508,9 +511,6 @@
; GCN-O1-OPTS-NEXT: TLS Variable Hoist
; GCN-O1-OPTS-NEXT: Early CSE
; GCN-O1-OPTS-NEXT: AMDGPU Remove Incompatible Functions
-; GCN-O1-OPTS-NEXT: AMDGPU Attributor
-; GCN-O1-OPTS-NEXT: FunctionPass Manager
-; GCN-O1-OPTS-NEXT: Cycle Info Analysis
; GCN-O1-OPTS-NEXT: CallGraph Construction
; GCN-O1-OPTS-NEXT: Call Graph SCC Pass Manager
; GCN-O1-OPTS-NEXT: AMDGPU Annotate Kernel Features
@@ -759,6 +759,9 @@
; GCN-O2-NEXT: Function Alias Analysis Results
; GCN-O2-NEXT: Lower OpenCL enqueued blocks
; GCN-O2-NEXT: Lower uses of LDS variables from non-kernel functions
+; GCN-O2-NEXT: AMDGPU Attributor
+; GCN-O2-NEXT: FunctionPass Manager
+; GCN-O2-NEXT: Cycle Info Analysis
; GCN-O2-NEXT: FunctionPass Manager
; GCN-O2-NEXT: Infer address spaces
; GCN-O2-NEXT: Expand Atomic instructions
@@ -814,9 +817,6 @@
; GCN-O2-NEXT: TLS Variable Hoist
; GCN-O2-NEXT: Early CSE
; GCN-O2-NEXT: AMDGPU Remove Incompatible Functions
-; GCN-O2-NEXT: AMDGPU Attributor
-; GCN-O2-NEXT: FunctionPass Manager
-; GCN-O2-NEXT: Cycle Info Analysis
; GCN-O2-NEXT: CallGraph Construction
; GCN-O2-NEXT: Call Graph SCC Pass Manager
; GCN-O2-NEXT: AMDGPU Annotate Kernel Features
@@ -1067,6 +1067,9 @@
; GCN-O3-NEXT: Function Alias Analysis Results
; GCN-O3-NEXT: Lower OpenCL enqueued blocks
; GCN-O3-NEXT: Lower uses of LDS variables from non-kernel functions
+; GCN-O3-NEXT: AMDGPU Attributor
+; GCN-O3-NEXT: FunctionPass Manager
+; GCN-O3-NEXT: Cycle Info Analysis
; GCN-O3-NEXT: FunctionPass Manager
; GCN-O3-NEXT: Infer address spaces
; GCN-O3-NEXT: Expand Atomic instructions
@@ -1134,9 +1137,6 @@
; GCN-O3-NEXT: Optimization Remark Emitter
; GCN-O3-NEXT: Global Value Numbering
; GCN-O3-NEXT: AMDGPU Remove Incompatible Functions
-; GCN-O3-NEXT: AMDGPU Attributor
-; GCN-O3-NEXT: FunctionPass Manager
-; GCN-O3-NEXT: Cycle Info Analysis
; GCN-O3-NEXT: CallGraph Construction
; GCN-O3-NEXT: Call Graph SCC Pass Manager
; GCN-O3-NEXT: AMDGPU Annotate Kernel Features
diff --git a/llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll b/llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
index 85a7f53fb9bab..babc9c3858f90 100644
--- a/llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
+++ b/llvm/test/CodeGen/AMDGPU/simple-indirect-call.ll
@@ -43,9 +43,9 @@ define amdgpu_kernel void @test_simple_indirect_call() {
; GFX9-LABEL: test_simple_indirect_call:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x4
-; GFX9-NEXT: s_add_u32 flat_scratch_lo, s6, s9
-; GFX9-NEXT: s_addc_u32 flat_scratch_hi, s7, 0
-; GFX9-NEXT: s_add_u32 s0, s0, s9
+; GFX9-NEXT: s_add_u32 flat_scratch_lo, s12, s17
+; GFX9-NEXT: s_addc_u32 flat_scratch_hi, s13, 0
+; GFX9-NEXT: s_add_u32 s0, s0, s17
; GFX9-NEXT: s_addc_u32 s1, s1, 0
; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: s_lshr_b32 s4, s4, 16
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