[PATCH] D143762: [AMDGPU] Enable whole wave register copy

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/test/CodeGen/AMDGPU/llc-pipeline.ll:368
 ; GCN-O1-NEXT:        Greedy Register Allocator
+; GCN-O1-NEXT:        SI Lower WWM Copies
 ; GCN-O1-NEXT:        GCN NSA Reassign
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I think I lost track of what was going on with -O0, did this lose the -O0 run?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D143762/new/

https://reviews.llvm.org/D143762