[llvm] e819f5c - [LegalizeTypes] Combine PromoteIntRes_VECTOR_DEINTERLEAVE and PromoteIntRes_VECTOR_INTERLEAVE. NFC
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 28 07:57:54 PDT 2023
Author: Craig Topper
Date: 2023-06-28T07:57:47-07:00
New Revision: e819f5cccfe93a674d9d437a08457db918cd73a7
URL: https://github.com/llvm/llvm-project/commit/e819f5cccfe93a674d9d437a08457db918cd73a7
DIFF: https://github.com/llvm/llvm-project/commit/e819f5cccfe93a674d9d437a08457db918cd73a7.diff
LOG: [LegalizeTypes] Combine PromoteIntRes_VECTOR_DEINTERLEAVE and PromoteIntRes_VECTOR_INTERLEAVE. NFC
The functions are identical except for the opcode of the node.
We can have a single function and use N->getOpcode().
Reviewed By: luke, paulwalker-arm
Differential Revision: https://reviews.llvm.org/D153929
Added:
Modified:
llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
Removed:
################################################################################
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
index 7c99a9fb8e2df..39eeb7fe0d6d5 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
@@ -116,11 +116,9 @@ void DAGTypeLegalizer::PromoteIntegerResult(SDNode *N, unsigned ResNo) {
Res = PromoteIntRes_VECTOR_SHUFFLE(N); break;
case ISD::VECTOR_SPLICE:
Res = PromoteIntRes_VECTOR_SPLICE(N); break;
- case ISD::VECTOR_DEINTERLEAVE:
- Res = PromoteIntRes_VECTOR_DEINTERLEAVE(N);
- return;
case ISD::VECTOR_INTERLEAVE:
- Res = PromoteIntRes_VECTOR_INTERLEAVE(N);
+ case ISD::VECTOR_DEINTERLEAVE:
+ Res = PromoteIntRes_VECTOR_INTERLEAVE_DEINTERLEAVE(N);
return;
case ISD::INSERT_VECTOR_ELT:
Res = PromoteIntRes_INSERT_VECTOR_ELT(N); break;
@@ -5462,27 +5460,13 @@ SDValue DAGTypeLegalizer::PromoteIntRes_VECTOR_SPLICE(SDNode *N) {
return DAG.getNode(ISD::VECTOR_SPLICE, dl, OutVT, V0, V1, N->getOperand(2));
}
-SDValue DAGTypeLegalizer::PromoteIntRes_VECTOR_DEINTERLEAVE(SDNode *N) {
+SDValue DAGTypeLegalizer::PromoteIntRes_VECTOR_INTERLEAVE_DEINTERLEAVE(SDNode *N) {
SDLoc dl(N);
SDValue V0 = GetPromotedInteger(N->getOperand(0));
SDValue V1 = GetPromotedInteger(N->getOperand(1));
EVT ResVT = V0.getValueType();
- SDValue Res = DAG.getNode(ISD::VECTOR_DEINTERLEAVE, dl,
- DAG.getVTList(ResVT, ResVT), V0, V1);
- SetPromotedInteger(SDValue(N, 0), Res.getValue(0));
- SetPromotedInteger(SDValue(N, 1), Res.getValue(1));
- return SDValue();
-}
-
-SDValue DAGTypeLegalizer::PromoteIntRes_VECTOR_INTERLEAVE(SDNode *N) {
- SDLoc dl(N);
-
- SDValue V0 = GetPromotedInteger(N->getOperand(0));
- SDValue V1 = GetPromotedInteger(N->getOperand(1));
-
- EVT ResVT = V0.getValueType();
- SDValue Res = DAG.getNode(ISD::VECTOR_INTERLEAVE, dl,
+ SDValue Res = DAG.getNode(N->getOpcode(), dl,
DAG.getVTList(ResVT, ResVT), V0, V1);
SetPromotedInteger(SDValue(N, 0), Res.getValue(0));
SetPromotedInteger(SDValue(N, 1), Res.getValue(1));
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h b/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
index ece1201e0459f..588999ab604f4 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
@@ -307,8 +307,7 @@ class LLVM_LIBRARY_VISIBILITY DAGTypeLegalizer {
SDValue PromoteIntRes_VECTOR_REVERSE(SDNode *N);
SDValue PromoteIntRes_VECTOR_SHUFFLE(SDNode *N);
SDValue PromoteIntRes_VECTOR_SPLICE(SDNode *N);
- SDValue PromoteIntRes_VECTOR_DEINTERLEAVE(SDNode *N);
- SDValue PromoteIntRes_VECTOR_INTERLEAVE(SDNode *N);
+ SDValue PromoteIntRes_VECTOR_INTERLEAVE_DEINTERLEAVE(SDNode *N);
SDValue PromoteIntRes_BUILD_VECTOR(SDNode *N);
SDValue PromoteIntRes_ScalarOp(SDNode *N);
SDValue PromoteIntRes_STEP_VECTOR(SDNode *N);
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