[PATCH] D153847: [AArch64] Remove vector shift instrinsic with shift amount zero
JinGu Kang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 28 05:46:33 PDT 2023
This revision was automatically updated to reflect the committed changes.
Closed by commit rG0e4d5b139816: [AArch64] Remove vector shift instrinsic with shift amount zero (authored by jaykang10).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D153847/new/
https://reviews.llvm.org/D153847
Files:
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/test/CodeGen/AArch64/arm64-vshift.ll
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