[PATCH] D153961: [WIP] DAG: Implement computeKnownBits for GlobalAddress
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 28 04:36:28 PDT 2023
arsenm created this revision.
arsenm added reviewers: AMDGPU, bogner, RKSimon.
Herald added subscribers: foad, kerbowa, hiraditya, jvesely.
Herald added a project: All.
arsenm requested review of this revision.
Herald added a subscriber: wdng.
Herald added a project: LLVM.
Use !absolute_symbol and alignment.
Currently requires many test updates. Many targets need to be updated
to use isBaseWithConstantOffset to undo everyone's favorite add->or
combine.
https://reviews.llvm.org/D153961
Files:
llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
llvm/test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll
Index: llvm/test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll
===================================================================
--- llvm/test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll
+++ llvm/test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll
@@ -9,7 +9,7 @@
; GCN-LABEL: {{^}}no_reorder_flat_load_local_store_local_load:
; GCN: flat_load_dwordx4
-; GCN: ds_write_b128 {{v[0-9]+}}, {{v\[[0-9]+:[0-9]+\]}} offset:512
+; GCN-DAG: ds_write2_b64 {{v[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}} offset0:64 offset1:65
; GCN: ds_read2_b32 {{v\[[0-9]+:[0-9]+\]}}, {{v[0-9]+}} offset0:129 offset1:130
define amdgpu_kernel void @no_reorder_flat_load_local_store_local_load(ptr addrspace(3) %out, ptr %fptr) #0 {
%ptr1 = getelementptr %struct.lds, ptr addrspace(3) @stored_lds_struct, i32 0, i32 1
Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
===================================================================
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -3956,6 +3956,16 @@
}
break;
}
+ case ISD::GlobalAddress:
+ case ISD::TargetGlobalAddress: {
+ const auto *GlobalNode = cast<GlobalAddressSDNode>(Op);
+ if (std::optional<ConstantRange> CR = GlobalNode->getGlobal()->getAbsoluteSymbolRange())
+ Known = CR->toKnownBits();
+
+ if (const auto *GO = dyn_cast<GlobalObject>(GlobalNode->getGlobal()))
+ Known.Zero.setLowBits(Log2(GO->getAlign().valueOrOne()));
+ break;
+ }
case ISD::FrameIndex:
case ISD::TargetFrameIndex:
TLI->computeKnownBitsForFrameIndex(cast<FrameIndexSDNode>(Op)->getIndex(),
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