[PATCH] D153947: [RISCV] Teach targetShrinkDemandedConstant to preserve (and X, neg)
Liao Chunyu via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 28 01:21:12 PDT 2023
liaolucy added a comment.
This patch relies on the D153934 <https://reviews.llvm.org/D153934>.
Otherwise, I tried another method:
diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
index ef9e96b6cca4..9a46455017c6 100644
--- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -13020,7 +13020,7 @@ bool RISCVTargetLowering::targetShrinkDemandedConstant(
// For the remaining optimizations, we need to be able to make a negative
// number through a combination of mask and undemanded bits.
- if (!ExpandedMask.isNegative())
+ if (!ExpandedMask.isNegative() && Opcode != ISD::AND)
return false;
// What is the fewest number of bits we need to represent the negative number.
@@ -13034,8 +13034,13 @@ bool RISCVTargetLowering::targetShrinkDemandedConstant(
NewMask.setBitsFrom(11);
else if (!C->isOpaque() && MinSignedBits <= 32 && !ShrunkMask.isSignedIntN(32))
NewMask.setBitsFrom(31);
- else
- return false;
+ else {
+ NewMask.setBitsFrom(31);
+ if (Opcode == ISD::AND && !C->isOpaque() && MinSignedBits <= 32 && !ShrunkMask.isSignedIntN(32) && NewMask.isSignedIntN(12))
+ return UseMask(NewMask);
+ else
+ return false;
+ }
// Check that our new mask is a subset of the demanded mask.
assert(IsLegalMask(NewMask));
Repository:
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https://reviews.llvm.org/D153947/new/
https://reviews.llvm.org/D153947
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