[PATCH] D153934: [SelectionDAG][TargetLowering]Add support for nuw/nsw on KnownBits::shl

[Liao Chunyu via Phabricator via llvm-commits]

liaolucy created this revision.
liaolucy added reviewers: craig.topper, nikic, spatel, RKSimon.
Herald added subscribers: foad, StephenFan, hiraditya.
Herald added a project: All.
liaolucy requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

1. Use KnownBits::shl() in SimplifyDemandedBits()
2. Add flags for KnownBits::shl in computeKnownBits()

Similar to e1aa91b36325 <https://reviews.llvm.org/rGe1aa91b36325086164b2dffd761b6d3960e40171>


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D153934

Files:
  llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp


Index: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
===================================================================
--- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -1763,10 +1763,10 @@
                                Depth + 1))
         return true;
       assert(!Known.hasConflict() && "Bits known to be one AND zero?");
-      Known.Zero <<= ShAmt;
-      Known.One <<= ShAmt;
-      // low bits known zero.
-      Known.Zero.setLowBits(ShAmt);
+      SDNodeFlags Flags = Op.getNode()->getFlags();
+      Known =
+          KnownBits::shl(Known, KnownBits::makeConstant(APInt(BitWidth, ShAmt)),
+                         Flags.hasNoUnsignedWrap(), Flags.hasNoSignedWrap());
 
       // Attempt to avoid multi-use ops if we don't need anything from them.
       if (!InDemandedMask.isAllOnes() || !DemandedElts.isAllOnes()) {
Index: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
===================================================================
--- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -3385,16 +3385,19 @@
       Known.Zero.setBitsFrom(1);
     break;
   }
-  case ISD::SHL:
+  case ISD::SHL: {
     Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
     Known2 = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
-    Known = KnownBits::shl(Known, Known2);
+    SDNodeFlags Flags = Op.getNode()->getFlags();
+    Known = KnownBits::shl(Known, Known2, Flags.hasNoUnsignedWrap(),
+                           Flags.hasNoSignedWrap());
 
     // Minimum shift low bits are known zero.
     if (const APInt *ShMinAmt =
             getValidMinimumShiftAmountConstant(Op, DemandedElts))
       Known.Zero.setLowBits(ShMinAmt->getZExtValue());
     break;
+  }
   case ISD::SRL:
     Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
     Known2 = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);


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