[llvm] a32499f - [RISCV] Fix encoding for Zcb instruction c.sh.

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Tue Jun 27 09:45:05 PDT 2023


Author: Craig Topper
Date: 2023-06-27T09:44:50-07:00
New Revision: a32499fba9591075bcf64068fd38dabee8ce921e

URL: https://github.com/llvm/llvm-project/commit/a32499fba9591075bcf64068fd38dabee8ce921e
DIFF: https://github.com/llvm/llvm-project/commit/a32499fba9591075bcf64068fd38dabee8ce921e.diff

LOG: [RISCV] Fix encoding for Zcb instruction c.sh.

Bit 6 should be 0.

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D153793

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVInstrInfoZc.td
    llvm/test/MC/RISCV/rv32zcb-valid.s

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/RISCVInstrInfoZc.td b/llvm/lib/Target/RISCV/RISCVInstrInfoZc.td
index 5fd323e25479a..ff7cdeff98c70 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoZc.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoZc.td
@@ -174,7 +174,7 @@ def C_LH  : CLoadH_ri<0b100001, 0b1, "c.lh">,
 
 def C_SB : CStoreB_rri<0b100010, "c.sb">,
            Sched<[WriteSTB, ReadStoreData, ReadMemBase]>;
-def C_SH : CStoreH_rri<0b100011, 0b1, "c.sh">,
+def C_SH : CStoreH_rri<0b100011, 0b0, "c.sh">,
            Sched<[WriteSTH, ReadStoreData, ReadMemBase]>;
 }
 

diff  --git a/llvm/test/MC/RISCV/rv32zcb-valid.s b/llvm/test/MC/RISCV/rv32zcb-valid.s
index edb1401f500fe..60a854aed9a34 100644
--- a/llvm/test/MC/RISCV/rv32zcb-valid.s
+++ b/llvm/test/MC/RISCV/rv32zcb-valid.s
@@ -67,7 +67,7 @@ c.lh a5, 2(a4)
 c.sb a5, 2(a4)
 
 # CHECK-ASM-AND-OBJ: c.sh a5, 2(a4)
-# CHECK-ASM: encoding: [0x7c,0x8f]
+# CHECK-ASM: encoding: [0x3c,0x8f]
 # CHECK-NO-EXT: error: instruction requires the following: 'Zcb' (Compressed basic bit manipulation instructions){{$}}
 c.sh a5, 2(a4)
 
@@ -116,7 +116,7 @@ lhu a5, 2(a4)
 sb a5, 2(a4)
 
 # CHECK-ASM-AND-OBJ: c.sh a5, 2(a4)
-# CHECK-ASM: encoding: [0x7c,0x8f]
+# CHECK-ASM: encoding: [0x3c,0x8f]
 sh a5, 2(a4)
 
 # CHECK-ASM-AND-OBJ: c.lbu s0, 0(s1)
@@ -136,5 +136,5 @@ c.lh s0, (s1)
 c.sb s0, (s1)
 
 # CHECK-ASM-AND-OBJ: c.sh s0, 0(s1)
-# CHECK-ASM: encoding: [0xc0,0x8c]
+# CHECK-ASM: encoding: [0x80,0x8c]
 c.sh s0, (s1)


        


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