[llvm] 868351f - [X86] combineMul - ensure getTargetConstantFromNode splat extraction is the correct element width

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2023-06-26T16:50:14+01:00
New Revision: 868351f894c3e4b36254efc3b09f20d1d479a8e3

URL: https://github.com/llvm/llvm-project/commit/868351f894c3e4b36254efc3b09f20d1d479a8e3
DIFF: https://github.com/llvm/llvm-project/commit/868351f894c3e4b36254efc3b09f20d1d479a8e3.diff

LOG: [X86] combineMul - ensure getTargetConstantFromNode splat extraction is the correct element width

The extracted Constant and Constant::getSplatValue can both be any bitwidth - they don't necessarily match the original ConstantSDNode type

Fixes #63507

Added: 
    llvm/test/CodeGen/X86/pr63507.ll

Modified: 
    llvm/lib/Target/X86/X86ISelLowering.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 888a2773357ba..b59bcc415dac5 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -48766,7 +48766,7 @@ static SDValue combineMul(SDNode *N, SelectionDAG &DAG,
         if (auto *SplatC = RawC->getSplatValue())
           C = &(SplatC->getUniqueInteger());
 
-    if (!C)
+    if (!C || C->getBitWidth() != VT.getScalarSizeInBits())
       return SDValue();
   } else {
     C = &(CNode->getAPIntValue());

diff  --git a/llvm/test/CodeGen/X86/pr63507.ll b/llvm/test/CodeGen/X86/pr63507.ll
new file mode 100644
index 0000000000000..4016f1c3edb67
--- /dev/null
+++ b/llvm/test/CodeGen/X86/pr63507.ll
@@ -0,0 +1,17 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s
+
+define <4 x i32> @PR63507() {
+; CHECK-LABEL: PR63507:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    vpbroadcastq {{.*#+}} xmm0 = [4294967295,4294967295]
+; CHECK-NEXT:    vpmulld %xmm0, %xmm0, %xmm0
+; CHECK-NEXT:    retq
+  %psll.i = tail call <4 x i32> @llvm.x86.sse2.psll.d(<4 x i32> zeroinitializer, <4 x i32> zeroinitializer)
+  %cmp.i = icmp eq <4 x i32> %psll.i, zeroinitializer
+  %sext.i = sext <4 x i1> %cmp.i to <4 x i32>
+  %shuffle.i101 = shufflevector <4 x i32> %sext.i, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
+  %mul.i = mul <4 x i32> %shuffle.i101, %shuffle.i101
+  ret <4 x i32> %mul.i
+}
+declare <4 x i32> @llvm.x86.sse2.psll.d(<4 x i32>, <4 x i32>)